Test: Floating Point Number Representation - Electronics and Communication Engineering (ECE) MCQ

IEEE single-precision floating-point:
IEEE single-precision floating-point computer numbering format is a binary computing format that takes up 4 bytes (32 bits) of memory. Binary32 is the official name for the 32-bit base 2 formats in IEEE 754-2008. IEEE 754-1985 referred to it as single.
IEEE single-precision format:

The given data,
Decimal value =(-1)^s x 1.M x 2^{Base Exponent -Bias}
Bias value in IEEE single-precision format is 127
R_A = 1100 0001 0100 0000 0000 0000 0000 0000
RA sign= 1
RA Base Exponent =100 0001 0 = 130
R_A Mantisa = 100 0000 0000 0000 0000 0000 = 1.100 0000 0000.....
Decimal value = (-1)¹ x1.1 x2^130-127 =-1.1x2³= -1100 = (-12)₁₀
A=-12
RB = 0100 0010 0001 0000 0000 0000 0000 0000
RA sign= 0
RA Base Exponent =100 0010 0= 132
RA Mantisa = 001 0000 0000 0000 0000 0000 = 1.001 000000.....
Decimal value = (-1)0 x1.001 x2132-127 =+1.001x25= + 100100 = (+36)10
B=+36
RC = 0100 0001 0100 0000 0000 0000 0000 0000
RA sign= 0
RA Base Exponent =100 0001 0= 130
RA Mantisa =100 0000 0000 0000 0000 0000= 1.100 0000.....
Decimal value = (-1)0 x1.1 x2130-127 =+1.1x23= + 1100 = (+12)10
C=+12
Option 1: A + C = 0
True, A+C= -12+12=0
Hence it is true.
Option 2: C = A + B
False, A+B= -12+36=+24
it not equal to C. Hence it is false.
Option 3: B = 3C
True, B=3C 
=3x+12 =36 =B
it equal to B. Hence it is true.
Option 4: (B - C) > 0
True, (B-C) >0
=(36-12)=24>0
Hence it is true.
Hence the correct answer is C = A + B.

A floating-point (FP) number is said to be normalized, if the most significant bit of the mantissa is 1.

• If the exponent is all zeros, the floating point number is denormalized and the most significant bit of the mantissa is known to be zero.
• The floating number representation has four parts:1. The first part represents a single fixed point number is called the mantissa.
• The second part designates the position of the decimal point and is called the exponent.
• The mantissa always a positive number holds the significant digits of the floating point number.
• The exponent indicates the positive or negative power of the radix that the mantissa and sign should be multiplied by.

The Institute of Electrical and Electronics Engineers created the IEEE Standard for Floating-Point Arithmetic (IEEE 754) in 1985 as a technical standard for floating-point calculation (IEEE). The standard addressed several issues encountered in various floating-point implementations.
IEEE 754 has 3 basic components are Sign, exponent, and  Mantissa.
Given that,
Exponent field =10 bits
Mantissa field = 21 bits 
Sign= 1 bit (represents the positive number or negative number)
Bias=Excess=2^n-1 where n is the number of bits in the Exponent.
To get Number = (-1)^S x (1.M) x B^E-Bias
Fewer mantissa bits mean less precision. The smallest change that can be represented in floating-point representation is called precision. In single precision, the mantissa is having 23 bits, and double-precision the mantissa is having 52 bits are required. Hence the less precision as there will be fewer Mantissa bits.
Hence the correct answer is It will provide less precision as there will be fewer Mantissa bits.

Stored numbers in registers R1 and R2 are in 2's complement form. Register size is 4 bits. The range of numbers in 2's complement form is -8 to +7. If R1 + R2, the result is out of the above range, then it is overflow.
The given data,
Given two four-bit registers R1 and R2.
Option 1: R1 = 1011 and R2 = 1110
False,  
R1      =  1 0 1 1 = -(0101)= -5
+ R2   =  1 1 1 0 = -(0010)= -2
-----------------------------------------------

               1 0 0 1  =           = -7        

Here No overflow occurred, because sign bit is same for (R1 + R2 ).
Option 2: R1 = 1100 and R2 = 1010
True,
R1      =  1 1 0 0 = -(0100)= -4
+ R2   =  1 0 1 0 = -(0110)= -6

  --------------------------------------------

              0 1 1 0 =            = -10       

Here Overflow occurred because the sign bit is different for (R1 + R2 ).
Option 3: R1 = 0011 and R2 = 0100
False,
R1      =   0 0 1 1 = +(0011)= +3
+ R2   =   0 1 0 0 = +(0100)= +4

  --------------------------------------------

                0 1 1 1                 =   +7       

Here No overflow occurred, because the sign bit is the same for (R1 + R2 ).
Option 4: R1 = 1001 and R2 = 1111
False, 
R1      =   1 0 0 1 = -(0111)  = -7
+ R2   =   1 1 1 1 = -(0001) = -1

  --------------------------------------------

                1 0 0 0 =               = -8
Here No overflow occurred, because the sign bit is the same for (R1 + R2 ).
Hence the correct answer is R1 = 1100 and R2 = 1010.

32-bit floating-point representation of a binary number in IEEE- 754 is,

Given binary number is
00111110011011010000000000000000
Here, sign bit is 0. So, number is positive.

Exponent bits = E = 01111100 = 124 (in decimal)
Mantissa bits M = 11011010000000000000000
In IEEE-754 format, 32-bit (single precision)
(-1)^s × 1.M × 2^{E – 127}
= (-1)⁰ × 1.1101101 × 2^{124 – 127}
= 1.1101101 × 2^-3
= (1 + 2^-1 + 2^-2 + 2^-4 + 2^-5 + 2^-7) × 2-3
= 0.231 = 2.31 × 10^-1 ≈ 2.27 × 10^-1

According to the IEEE Std 754-2008 standard, the exponent field width of the binary 64 double-precision floating-point formats is 11 bits, which is compensated by an exponent bias of 1023. The standard also specifies that the maximum exponent is 1023, and the minimum is -1022.

In IEEE- 754 single precision format, a floating-point number is represented in 32 bits.

Sign bit value 0 means positive number, and 1 means a negative number.
The floating-point number can be obtained by formula: ± 1. M × 2^(E-127)
Data:
Content of R1: 0x 42200000               (0x means Hexadecimal notation)
Content of R2: 0x C1200000
Calculation:
Content of R1 in Hex (0x) is 42200000. After converting into binary, it can be represented in IEEE- 754 format as:

Sign bit is 0 i.e. the number is positive
Biased Exponent (E’) = 100 0010 0 = 132
Normalized Mantissa (M) = 010 0000 0000 0000 0000 0000 = .25
Therefore, the number in register R1 = + 1.25 * 2^(132-127) = 1.25 × 32 = 40
Content of R2 in Hex (0x) is C1200000. After converting into binary, it can be represented in IEEE- 754 format as:

Sign bit is 1 i.e. the number is negative
Biased Exponent (E’) = 100 0001 0 = 130
Normalized Mantissa (M) = 010 0000 0000 0000 0000 0000 = .25
Therefore, the number in register R1 = - 1.25 * 2^(130-127) = -1.25 * 8 = -10
R3 = R1/R2 = 40/-10 = -4
Since the number is negative, Sign bit (MSB) = 1
Converting 4 into binary of a floating point gives: (100.0)₂
Representing it into normalized form gives:  (1.000000….) × 2²
Therefore, Mantissa is 23 bits of all 0s
Biased Exponent (E’) = E+ 127 = 2+127 = 129 = (10000001)₂
It can be represented in IEEE- 754 format as:

Converting it into Hex format gives: 0x C0800000

32-bit floating-point representation of a binary number in IEEE- 754 is

Binary number is
0xC0000000 = (11000000000000000000000000000000)₂
Here, the sign bit is 1. So, the number is negative.

Exponent bits = E = 10000000 = 128 (in decimal)
Mantissa bits M = 00000000000000000000000
In IEEE-754 format, 32-bit (single precision)
(-1)s × 1.M × 2E – 127
= (-1)1 × 1. 0 × 2128 – 127
= -1 × 1.0 × 2
= -2
In IEEE floating-point representation, the hexadecimal number 0xC0000000 corresponds to -2.

Diagram:
i represents an integral part of the and f represents the fractional part of the number.
Since, the n number is in unsigned representation, it's decimal value starts with 0. So Minimum value will be zero.
Range of unsigned representation is 0 to 2ⁱ - 1.
So, the mum value with i bits goes to 2ⁱ - 1.
Fraction of value is in the form of 2^(-i). So, when we take the value of i = 1, 2, 3 … n this range of fractional value goes like, 2^-1, 2^-2, 2^-3, …
So, it makes a GP series, with f bit maximum number possible is sum of GP series.
Consider a = ½, r = ½
Maximum value with f bits possible

So, maximum fractional value possible
= maximum value with i bits + maximum value with f bits
= 2ⁱ - 1 + 1 - 2^-f
= 2ⁱ - 2^-f
So, require range will be 0 to 2ⁱ - 2^-f. 

32-bit floating-point representation of a binary number in IEEE- 754 is

In IEEE-754 format, 32-bit (single precision)
(-1)^s × 1.M × 2^{E – 127}
Calculation:
Convert: 40.1 to binary
Step 1: convert 40

(40)₁₀ = (101000)₂
Step 2: convert .1 to binary
0.1 × 2 = 0.2           (0)
0.2 × 2 = 0.4           (0)
0.4 × 0.2 = 0.8        (0)
0.8 × 0.2 = 1.6        (1)
0.6 × 0.2 = 1.2        (1)
0.2 × 0.2 = 0.4        (0)  and so on
Given binary number is
(40.1)₁₀ = (101000.000110011001100…)₂
(40.1)₁₀ = 1.0100 0000 1100 1100 … × 2⁵
Signed (1 bit) = 1 (given number is negative)
Exponent (8 bit) = 5 + 127 = 132
∴ Exponent = (132)₁₀ = (1000 0100)₂
Mantissa (23 bits ) = 0100 0000 1100 1100 1100 110

(1100 0010 0010 0000 0110 0110 0110 0110)₂ = (C2206666)₁₆
(C2206666)₁₆ = 0xC2206666