SRAM and DRAM - Free MCQ Practice Test with solutions, GATE ECE Engineering

EEPROM
EEPROM is a PROM that is that can be erased and reprogrammed using an electrical charge.

• EEPROM is a user-modifiable ROM.
• It also has a limited life - that is, the number of times it can be reprogrammed is limited to tens or hundreds of thousands of times.
• These can be programmed using special external programming signals.
• These are organized as an array of floating gate transistors.

NOTE: A special form of EEPROM is flash memory, which uses normal PC voltages for erasure and reprogramming.
SRAM
Data is stored in the transistors and requires a constant power flow.

• Because of the continuous power supply, SRAM doesn’t need to have the refreshing circuit.
• It is more expensive and holds fewer data per unit volume. So, used in cache.
• The power consumption of the SRAM is dependent on how frequently it is used.

DRAM
SDRAM (synchronous DRAM) is a generic name for various kinds of DRAM that are synchronized with the clock speed that the microprocessor is optimized for. 

• The clock frequency of the microprocessor is half of the frequency of the crystal oscillator used.
• In the DRAM operation of the external pin, the interface is maintained by an externally applied clock signal.
• For DRAM continuous refreshing clock cycles are required for the retention of data stored.

MARAM
It stores the data in magnetic form instead of electric charges.

• It uses far less power than other RAMs so it is good for portable devices.
• Magnetoresistance is the tendency of a material (often ferromagnetic) to change the value of its electrical resistance in an externally-applied magnetic field.
• On account of the rising demand for fast, scalable, low power consuming, and non-volatile memory devices, especially in the automotive, enterprise storage, and aerospace and defense sectors, the global market for magnetoresistive RAM (MRAM) is likely to gain significant impetus over the forthcoming years.

The total capacity of memory is given by:
2^{no. of address lines} × No. of data lines.
Calculation:-
No. of address lines → 16[0−15]
No. of data lines → 8[0−7]
The total capacity of memory:-
→ 2¹⁶ × 2³
→ 2¹⁰ × 2⁶ × 2³
→ 64 KB.

• DRAM Stores each bit of data in a separate capacitor.
• Electric charge on the capacitors slowly leaks off so data on chip would slowly be lost.
• To prevent them, DRAM refreshes periodically so due to refreshment it is difficult to interface with CPU.
• Since dynamic memory refreshes periodically so due to refreshment it is difficult to interface it.

Hence option 2 is the correct answer.

To store one bit of information in our main memory we need Dram Cell which is made up of capacitor and transistor but capacitor has tendency to forget the charge or losing it’s energy to maintain that energy we required periodic Refreshing of DRAM

• Main memory is build up from DRAM chips.
• Cache memory is build up from SRAM chips.

From above explanation it is clear that DRAM is the correct answer.

In a DRAM, a capacitor to store a bit of data is used along with a MOSFET (transfer device) which acts as a switch. The circuit is as shown –

In a DRAM:

• Periodic refreshing is required.
• The information is stored in a capacitor.
• Both read and write operations cannot be performed simultaneously.

i) In DRAM Storage element = Capacitor
ii) In SRAM storage element = flip – flop

In a DRAM, a capacitor is used to store a bit of data along with a MOSFET (transfer device) which acts as a switch.
The circuit is as shown:

In a DRAM:

• Periodic refreshing is required.
• The information is stored in a capacitor.
• Both read and write operations cannot be performed simultaneously.

In a DRAM, a capacitor to store a bit of data is used along with a MOSFET (transfer device) which acts as a switch. The circuit is as shown –

In a DRAM:

• DRAM chips are described as xN, where N refers to the number of output pins so one rank may be composed of eight x8 DRAM chips. It means that it provides output in bursts of 8 bits. Hence option(3) is the correct answer.
  
• It requires only one transistor to store one-bit data whereas SRAM requires 6 transistors.
• The information is stored in a capacitor.
• Both read and write operations cannot be performed simultaneously.
• To store one bit of data, DRAM needs one transistor and one capacitor.
• Since the capacitor stores the data in the form of charge.
• To keep the charge stored for a long duration, the capacitor needs to constantly be refreshed.

So DRAM is slower and used for main memory.