GATE Computer Science Engineering(CSE) 2027 Test: Digital Circuits & Flip

This is the implementation asked in question
C0 = 0 , C1 = 0  line 00 will be selected and F will give (A+B)'
C0 = 0 , C1 = 1  line 01 will be selected and F will give (A+B)
C0 = 1 , C1 = 0  line 10 will be selected and F will give (A⊕B)
C0 = 1 , C1 = 1 line 11 will be selected and F will give (A+B)'.(A+B) =0

For 2ⁿ inputs we are having n outputs.
Here n = 2.

2X1 multiplexer

As in a 2⁸ Counter the range would be from 0-255. Hence to go from 10101100 (172) to 00100111 (39) , the counter has to go initially from 172 to 255 and then from 0 to 39.
Hence to go from 172 to 255,  255-172 = 83 Clock pulses would be required. then from 255 to 0 , again 1 clock pulse would be required.Then from 0 to 39 , 39 clock pulses would be required. Hence in total 83+1+39 =123 Clock pulses would be required.

mod 258 counter has 258 states. We need to find no. of bits to represent 257 at max.
2ⁿ > 258 ⇒ n > 9.

In binary counter of n bits can count upto 2ⁿ numbers..when this op from counter  is fed to decoder one of n out of ²n will be activated..so this arrangement of counter and decoder is behaving as 2ⁿ(k) ring counter..

0000 - 0
1000 - 8
1100 - 12
and so on.

By using above excitation table, T1=q1'q0,
T2=(q1q0)'=q1'+q0'

A function is self dual if it is equal to its dual (A dual function is obtained by interchanging.  and +).
For self-dual functions,
1. Number of min terms equals number of max terms
2. Function should not contain two complementary minterms  - whose sum equals 2ⁿ - 1, where n is the number of variables.

so here (0,7) (1,6) (2,5) (3,4) are complementary terms so in self-dual we can select any one of them but not both. possibility because say from we can pick anyone in minterm but not both.

NOTE:here i have taken only one of the complementary term for min term from the sets.
so remaining numbers will go to MAXTERMS
For above example, 2⁴ = 16 self dual functions are possible
so if we have N variables, total Minterms possible is 2ⁿ
then half of them we selected so .
and now we have 2 choices for every pair for being selected.
so total such choices

Both inputs of a latch are directly connected to the other’s output. Such types of structure is called cross coupling and due to which latches remain in the latched condition.

In a JK flip flop the output toggles when both J and K inputs are 1. So, we must ensure that with each clock the output from the previous stage reaches the current stage. From the figure, there is an AND gate between each stage and  (10ns for output to reach the gate and 10ns for the output of AND gate to reach the next flipflop) isneeded for the output to reach the next stage. So, minimum time period needed for clock is 20ns which would mean a maximum clock frequency of 

Ans : C) The smallest number is represented by all zeros.
In computer system, a floating-point number is represented as S E M, i.e. using Sign bit, Exponent bits and Mantissa bits.
The exponent can be a positive as well as a negative number. So to represent negative number we can use 1's complement or 2's complement. Better choice would be 2's complement.
If we use 2's complement system to represent exponent, then problem will arise while comparing 2 floating point numbers.
For example, if exponent of the 2 numbers are negative then for comparing we will have to convert them into positive number.
So to avoid this extra work, excess-N code is used so that all exponent can be represented in positive numbers, starting with 0.

Maximum difference between two successive real number will occur at extremes. This is because numbers are represented upto mantissa bits and as the exponent grows larger, the difference gets multiplied by a larger value. (The minimum difference happens for the least positive exponent value).
Biasing will be done by adding 31 as given in question. So, actual value of exponent will be represented value - 31. Also, we can not have exponent field as all 1's as given in question (usually taken for representing infinity, NAN etc). So, largest value that can be stored is 111110 = 62.

Largest number will be
Second largest number will be 

answer = option D in both questions.

For finding normalised representation we need to find unnormalised one first..So we have , 0.239 * 2¹³ as the number ..So we find the binary equivalent of 0.239 till 8 digits as capacity of mantissa field is 8 bits..
So following the procedure we have , 0.239 * 2 = 0.478
0.478 * 2 = 0.956
0.956 * 2 = 1.912
0.912 * 2 = 1.824
0.824 * 2 = 1.648
0.648 * 2 = 1.296
0.296 * 2 = 0.512
0.512 * 2 = 1.024
We stop here as we have performed 8 iterations and hence 8 digits of mantissa of unnormalised number is obtained.So we have

Mantissa of given number  =  0011 1101
So the number can be written as : 0.00111101 * 213 Now we need to align the mantissa towards left to get normalised number..And in the question it is mentioned that during alignment process 0's will be padded in the right side as a result of mantissa alignment to left..
So to get normalised number , we align to left 3 times , so new mantissa = 11101 000
So exponent will also decrease by 3 hence new exponent  =  10
So normalised number = 1.11101000 * 2¹⁰
So actual exponent = 10
Given excess 64 is used..So bias value = 64

So exponent field value = 74
And of course sign bit = 0 being a positive number.
Thus the final representation of number  =  0 1001010 11101000         =  0100 1010 1110 1000
        =  (4AE816)
Hence D) should be the correct answer.