BDL MT Electronics Mock Test - 3 Free Online Test 2026

Concept:
For maximum power transfer, the load impedance of a transformer reflected on the primary side must equal the input impedance.
The load impedance reflected on the primary side is given by:

ZL = Load impedance at the secondary

Where,
1 : n = turns ratio
N_s = secondary turns
N_p = primary turns

Calculation:
Given ZL = 20 Ω
Zin = 5 Ω
The given circuit is drawn as:

For maximum transfer ZL(reflected) must equal Zin, i.e.

n² = 20/5 = 4
n = 2

Turns ratio is, therefore:
1 : n = 1: 2

The transconductance of JFET:

Transconductance (g_m) is the ratio of change in drain current (δI_D) to change in the gate to source voltage (δV_GS) at a constant drain to source voltage (V_DS = Constant).

g_m = (δID) / (δVGS) at constant VDS

This value is maximum at V_GS = 0 and it is denoted by g_mo

The transconductance at any other value of gate to source voltage (g_m) can be determined as follows. The expression of drain current (I_D) is

Where

I_DSS is shorted gated drain current

V_GS(off) is Cut Off Gate Voltage

By partial differentiating the expression of drain current (I_D) in respect of gate to source voltage (V_GS)

At V_GS = 0, the transconductance gets its maximum value and that is

In the given question bias voltage is zero hence trance conductance is maximum

Calculation:

Given,

IDSS = 9 mA and Vp = - 3 V

V_GS(off) is the modules of V_p

Hence V_GS(off) = 3 V

g_mo = (2 × 9 × 10^-3) / 3

= 6 × 10^-3 S = 6 mS

Therefore, The value of transconductance at a bias voltage of 0 V for the JFET is 6 mS

Connected graph: A graph is said to be connected if there exists at least one path between any two vertices (nodes) of the network. On the other hand, if a graph contains at least two separate parts, then it is called an unconnected graph graph.

Superposition theorem (SPT):

In any linear bilateral active network consists of a number of services (more than 1), resistance, etc. the effect produced in any element where all sources act at a time is equal to the sum of the effects produced in the same element due to each source considered individually.

For input: K₁ x₁ ; Output: K₂ y₁
For input: K₂ x₂ ; Output: K₂ y₂
For input: (K₁x₁ + k₂x₂); Output: (k₁y₁ + k₂y₂

Superposition Theorem obeys:
1) Linearity (ohm’s law)
2) Homogenity
3) Additivity

Example:

V₂ is an AC source.

I = ‘I’ due to V₁ + ‘I’ due to V₂ + ‘I’ due to I₁’.

NOTE:

• While applying the superposition theorem, each subcircuit has only one independent source.
• The remaining sources should be replaced with their internal resistance.
• Voltage source internal resistance is zero (short)
• The current source internal resistance is infinity (open)

Calculation:
Z = R + j X_L
X_L = 30 × 10^-3 × 100
= 3 Ω
Z = 3 + j3

Concept:

Transient response of second-order control system is as shown:

Delay time: It is the time required to rise from 0 to 50% of the final value.

ω_n = natural frequency

ξ = Damping ratio

statement (3) correct.

Rise time (t_r): It is the time required for the response to rise from:

0 to 100% (underdamped) (ξ < 1)
5% to 95% (critical damped) (ξ = 1)
10% to 90% (overdamped) (ξ > 1)
Of final value.

Peak time (t_p): It is the time required for the response to rise from zero to the peak of the time response

n – 1, 2, 3, …
n – 1, first overshoot
n – 2 first undershoot

Settling time (t_s): It is the time required to rise and reach the tolerance band and stay within (2% or 5%) tolerance band of final value.

For 2% tolerance band:

For 5% tolerance band:

Statement (2) correct

Peak overshoot (M_p): It gives the normalized difference between the steady-state output to the first peak of time response.

Characteristic equation

s(s + 4)(s2 + 2s + 2) + K(s + 1) = 0

Intercept of the asymptotes is the centroid.

Centroid

The poles of the transfer function are: 0, -4, -1 + j, -1 - j
The zero of the transfer function is -1
Sum of poles = 0 - 4 - 1 - 1 = -6
Centroid is, therefore:

Concept:
Causal and Non-Causal:
1) A system is said to be Causal if its output depends only upon the present and past inputs.
2) For Non-Causal, the output depends on future inputs as well.
3) If h(t) = 0 for t < 0, the system is said to be causal.

Stability:

1) An LTI system is said to be stable if every bounded input produces a bounded output. The system is then said to be a BIBO stable system.
2) Also, an LTI system is stable if its impulse response function is absolutely integrable, i.e.

If , the system is stable.

Application:

Given:

Since h(t) ≠ 0, t < 0, the system is non causal.
For stability:

Let the frequency spectrum of x(t) be as shown:

Given sampling frequency = 38 kHz
The shifted spectrum will be as shown:

We observe that there is aliasing or overlapping happening for f > 18 kHz.
Therefore, we can reconstruct the part of x(f) for f < 18 kHz only.

In the context of digital signal processing, 4X oversampling means that the sampling rate is increased by a factor of four. So, for every original sample, you will have three additional interpolated data points inserted between each original sample.

Explanation:

• If you have no oversampling, you have the original samples with no extra points between them.
• With 2X oversampling, you insert one interpolated point between each original sample.
• With 3X oversampling, you insert two interpolated points between each original sample.
• With 4X oversampling, you insert three interpolated points between each original sample.

So the correct answer is: 2) 3

No of comparators required for n bit flash type ADC is (2ⁿ - 1)
Given that, n = 12
No of comparators = 4095

While choosing a particular digital IC for an application, its specifications or characteristics should be taken into account.
The main specifications for logic families are as follows:
Fan-in: The number of inputs that can be connected to a logic gate is called its ‘Fan-in’.
Fan-out: The number of units that can be connected to the output of a logic gate is called its ‘Fan-out’.
CMOS has the highest fan-out among the given logic families.

A comparison of the given logic families is as shown:

F = A̅B̅C̅D + AB̅C̅D + BD + BCD̅
= B̅C̅D (A̅ + A) + B(D + D̅C)
= B̅C̅D + B (D + C)
= B̅C̅D + BD + BC
= D(B + B̅C̅) + BC
= D(B + C̅) + BC
= BD + C̅D + BC
= B(C+C̅)D + BC +C̅D
= BCD + BC̅D +BC +C̅D
= BC(1+D) +C̅D (1+B)
= C̅D + BC

Hall Voltage states that if a specimen (metal or semiconductor) carrying a current I is placed in transverse magnetic field B, an electric field is induced in the direction perpendicular to both I and B.
Hall Voltage is given by:

ρ = Charge density
Hall coefficient can be written as:

Where,
ρ = charge density = σ / μ
n = charge concentration
σ = conductivity
μ = mobility constant
Hence, the Hall coefficient becomes

The Hall effect provides information on the sign, concentration, and mobility of charge carriers in the normal state.
A positive sign for the Hall coefficient indicates that the majority carriers are holes and the semiconductor is P-type.
A negative sign for the Hall coefficient indicates that the majority carriers are electrons and the semiconductor is N-type.
Applications of Hall-effect:
Hall effect can be used to find:
1. Carrier concentration
2. Type of semiconductor
3. Conductivity
4. Mobility
It cannot be used to find a magnetic field.
Common Confusion Point:
Looking at the formula one can think that the magnetic field can be calculated but in the HALL Experiment, perpendicular MAGNETIC field and electric field are applied on the material and other parameters are measured.

A PIN diode consists of heavily doped p and n regions separated by a high resistivity material
PIN diode:

• A PIN diode is frequently used as a switching diode for frequencies up to GHz range, it is a microwave switch
• In PIN diode the intrinsic semiconductor is sandwiched in between high doped P and high doped N regions
• PIN diodes offer very small switching times
• The smaller switching time is due to the high resistivity of an intrinsic layer
• Due to increased depletion region, the covalent bonds break and increase the surface area for photosensitivity
• it’s photosensitive in reverse bias
• This property is used in fields of light sensors, image scanners, artificial retina systems

PIN diode represented as:

Concept:
Ion implantation:

• It is one of the methods for selective doping, their doping profile is more precisely controlled.
• Since it is performed at low temperatures, it is suitable for compound semiconductors.
• With these techniques, we can store the doping profile with greater flexibility.
• With the diffusion technique, we get peak doping concentration at the surface only but with ion implantation, it is possible to get peak doping concentration below the surface also. Because of this advantage, now a days ion-implantation is mostly preferred in MOS and BJT.
• With the photolithography process, we can remove the unwanted masking area and allow diffusion on Ion implantation metallization.
• It is a process to interconnect all the electronic devices present on the wafer so that ohmic contact can form.

Analysis:
Steps to fabricate PMOS in ascending order.

1. The oxide layer is the starting point for PMOS fabrication.
2. The Gate oxidation steps are performed to create the Gate oxide layer.
3. Use photolithography and etching to remove SiO2 on the source and drain.
4. The ion implantation process is used to create the P-type regions for the PMOS transistors.
5. Metallization i.e. aluminium deposition.

Transresistance or trans-impedance amplifier is normally used as a current to voltage converter which requires low input and low output impedances for its proper operation.

Requirements of input and output impedances for different amplifiers are listed below:

Concept:
A current controlled current source (CCCS) is as shown:

This is also called as a Current-Shunt feedback with a current amplifier:
Input Resistance:
 R_if = R_i (1 + Aβ)  (Decreases)
Output Resistance:
R_of = R_o / (1 + Aβ) (Increases)
Calculation:
Input impedance = 10 Ω
Output impedance = 100 kΩ
loop again (Aβ) = 9
Closed loop impedance will be:
Z_out = Zo [1 + Aβ]
= 100 × 103 [1 + 9]
= 1000 kΩ
Calculation:
Given that,
Input impedance = 10 Ω
Output impedance = 100 kΩ
loop again (Aβ) = 9
closed loop impedance = Z_o [1 + Aβ]
= 100 × 10³ [1 + 9]
= 1000 kΩ

Important Points

i) Voltage-Series feedback with voltage amplifier:
Input Resistance:
R_if = R_i (1 + Aβ) (Increases)
Output Resistance:
 R_of = R_o / (1 + Aβ) (Decreases)
ii) Current-Series feedback with a transconductance amplifier:
Input Resistance:
R_if = R_i (1 + Aβ) (Increases)
Output Resistance:
R_of = R_o / (1 + Aβ)  (Increases)
iv) Voltage-Shunt feedback with trans resistance amplifier:
Input Resistance:
R_if = R_i (1 + Aβ)   (Decreases)
Output Resistance
R_of = R_o / (1 + Aβ) (Decreases)

Configuration of two transistors in which collectors are connected and emitter of first drives base of second, it achieves beta multiplication is called Darlington pair.
Darlington Pair: CC – CC

• Darlington pair is a special arrangement of two standard NPN or PNP bipolar junction transistors (BJT) connected together
• The Emitter of one transistor is connected to the base of the other to produce a more sensitive transistor with a much larger current gain
• It is useful in applications where current amplification or switching is required; The voltage gain is unity in this case

The symbolic diagram of the Darlington pair is shown below

It has a high current gain β (equal to the product of current gain of individual transistors)
It also has high input impedance and low output impedance.

The voltage and current expressions in a transmission line are given by:​

l = distance from the load

β = Phase Constant = 2π/λ

Γ_L = Reflection coefficient at the load.

Let the reflection coefficient at the load end be written in the amplitude and phase form as:

The voltage and current equations will now become:

Variation of Current and Voltage:

• Whenever ϕ - 2βl = 0 or even multiple of π, the quantity in the brackets will be maximum of (1 + |Γ_L|) in the voltage expression and minimum of (1 - |Γ_L|) in the current expression.
• Whenever the voltage is maximum, the current amplitude is minimum.
• Similarly wherever ϕ - 2βl = odd multiple of π, the voltage is minimum and the current is maximum.
• From the above observations, the distance between the two adjacent voltage maxima (or minima) or two adjacent current maxima (or minima) is calculated by:

2βl = π

l = λ/2

Note:

The distance between adjacent voltage and current maxima or minima is calculated as:

l = λ/4

A dipole antenna is a linear antenna, usually fed in the center and producing maximum of radiation in the plane normal to the axis.
It is said to be short dipole when length is less than ?⁄? and current distribution is sinusoidal.
Radiation intensity is maximum along the normal to the dipole axis.

Concept:
The total transmitted power for an AM system is given by:
P_t = P_c (1 + (μ²/2
Pc = Carrier Power
μ = Modulation Index
Analysis:
When the carrier is not modulated, i.e. modulation index = 0, the transmitted power is the carrier power only, i.e.
P_t = P_C
When modulated with a modulation index of 40%, the total power is calculated as:
P_t = P_c (1 + (0.4²/2)
The percentage increase in power will be:

 = 0.4²/2 x 100 %
= 8 %

Shannon-Hartley Theorem- It tells the maximum rate at which information can be transmitted over a communications channel of a specified bandwidth in the presence of noise.
C = Blog₂ (1 + S/N)
Where C is the channel capacity in bits per second
B is the bandwidth of the channel in hertz
S is the average received signal power over the bandwidth
N is the average noise
S/N is the signal-to-noise ratio (SNR)
For transmitting data without error R ≤ C where R = information rate
Assume information Rate = R
Form Shanon hartley theorem
R_max = C
R = Blog₂ (1 + SNR)
When channel Band width (B) = B₁
Signal to noise ratio = SNR₁
R₁ = B₁Log₂(1+ SNR\
If SNR ≫ 1
R₁ = B₁Log₂(1+ SNR₁ ---(1)
When channel B ⋅ ω = 2B₁
Let signal to noise Ration = SNR₂
Information Rate = R₂
R₁ = B₁Log₂(1+ SNR₂  ---(2)
Given- R₂ = R₁
2B₁ log₂SNR₂ = B₁log₂SNR1
SNR₂ = ( SNR₁) 1/2

Control Unit:

The control unit is the part of a microprocessor that is responsible for the decoding of instructions and transfer of data from memory to microprocessor and vice versa.

Assembler:

The assembler is a program that translates the mnemonics/ assembly language into machine language (0’s and 1’s) and stores it into the memory

Compiler:

The compiler reads the whole program written in, High-level language, first and translates into the object code that is executed by the microprocessor

Interpreter:

• The READY signal is used to insert wait states into the bus cycle such that it is extended by a number of clock periods
• This signal is provided by an external clock generator device and can be supplied by the memory or I/O subsystem
• It is used to signal the 8086 when they are ready to permit the data transfer to be completed

Explanation:
We have the integration given as,

Placing the limits we get,

I = 1/5 + 1/21 = 26/105
Hence the required value of integration will be 26/105 .

Improper integral

Converges: If the limit exists when applied and it is a finite number

Diverges: If a limit does not exist or

Calculation:

Given:

Given improper integral

Applying limit by the value a tends to ∞

∴ The improper integral converges to 0.5

Concept:
Euler Cauchy Homogeneous linear equation:

Take x = et ⇒ t = log x
dy/dx = dy/dt ⋅ dt/dx = dy/dt ⋅ (1/x) ⇒ x dy/dx = dy/dt = Dy

Calculation:
The given differential equation is x² (d²y/dx²) - x (dy/dx) + y = 2x log x  
Put x = e^t
D (D – 1)y – Dy + y = 2te^t
⇒ [D² -2D + 1] y = 2te^t
To get complementary function, D² -2D + 1 = 0
⇒ D = 1
CF = (A + tB) e^t
= (A + B log x) x

Given

Selling price of book at 22% loss = Rs. 1170

Formula used

Cost Price = [Selling price/(100 - loss%)] × 100

Loss% = (Cost Price - selling price/cost price) × 100

Calculation

Cost price of book = 1170 × 100/78 = Rs. 1500

Loss% = [(1500 - 1450)/1500] × 100 = 3.33%

∴ The required answer is 3.33% loss

The logic follows here is :-

Given,
GJBL : TUXF is follows as shown in below diagram :

Similarly,
HKFM : VXZR

Thus, the correct answer is "HKFM : VXZR".