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Computer Science Engineering (CSE) Exam  >  Computer Science Engineering (CSE) Tests  >  Test: Accessing I/O Devices - Computer Science Engineering (CSE) MCQ

Test: Accessing I/O Devices - Computer Science Engineering (CSE) MCQ


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10 Questions MCQ Test - Test: Accessing I/O Devices

Test: Accessing I/O Devices for Computer Science Engineering (CSE) 2024 is part of Computer Science Engineering (CSE) preparation. The Test: Accessing I/O Devices questions and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus.The Test: Accessing I/O Devices MCQs are made for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Accessing I/O Devices below.
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Test: Accessing I/O Devices - Question 1
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In memory-mapped I/O ____________

Detailed Solution for Test: Accessing I/O Devices - Question 1

Answer: a
Explanation: Its the different modes of accessing the i/o devices.

Test: Accessing I/O Devices - Question 2
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The usual BUS structure used to connect the I/O devices is

Detailed Solution for Test: Accessing I/O Devices - Question 2

Answer: c
Explanation: BUS is a collection of address,control and data lines used to connect the various devices of the computer.

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Test: Accessing I/O Devices - Question 3
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In intel’s IA-32 architecture there is a seperate 16 bit address space for the I/O devices? 

Detailed Solution for Test: Accessing I/O Devices - Question 3

Answer: b
Explanation: This type of accessing is called as I/O mapped devices.

Test: Accessing I/O Devices - Question 4
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 The advantage of I/O mapped devices to memory mapped is
Detailed Solution for Test: Accessing I/O Devices - Question 4

Answer: c
Explanation: Since the I/O mapped devices have a seperate address space the address lines are limited by amount of the space allocated.

Test: Accessing I/O Devices - Question 5
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The system is notified of a read or write operation by
Detailed Solution for Test: Accessing I/O Devices - Question 5

Answer: d
Explanation: It is necessary for the processor to send a signal intimating the request as either read or write.

Test: Accessing I/O Devices - Question 6
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To overcome the lag in the operating speeds of the I/O device and the processor we use
Detailed Solution for Test: Accessing I/O Devices - Question 6

Answer: b
Explanattion: The processor operating is much faster than that of the I/O devices , so by using the status flags the processor need not wait till the I/O operation is done. It can continue with its work until the status flag is set.

Test: Accessing I/O Devices - Question 7
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The method of accessing the I/O devices by repeatedly checking the status flags is
Detailed Solution for Test: Accessing I/O Devices - Question 7

Answer: a
Explanation: In this method the processor constantly checks the status flags , and when it finds that the flag is set it performs the appropriate operation.

Test: Accessing I/O Devices - Question 8
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The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is
Detailed Solution for Test: Accessing I/O Devices - Question 8

Answer: c
Explanation: This is a method of accessing the I/O devices which gives the complete power to the devices, enabling them to intimate the processor when they’re ready for transfer.

Test: Accessing I/O Devices - Question 9
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The method which offers higher speeds of I/O transfers is
Detailed Solution for Test: Accessing I/O Devices - Question 9

Answer: d
Explanation: In DMA the I/O devices are directly allowed to interact with the memory with out the intervention of the processor and the transfres take place in the form of blocks increasing the speed of operaion.

Test: Accessing I/O Devices - Question 10
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The process where in the processor constantly checks the status flags is called as
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Important Questions for Accessing I/O Devices

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