The return address from the interrupt-service routine is stored on the
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The signal sent to the device from the processor to the device after recieving an interrupt is
When the process is returned after an interrupt service ______ should be loaded again.
i) Register contents
ii) Condition codes
iii) Stack contents
iv) Return addresses
The time between the recieval of an interrupt and its service is ______
A single Interrupt line can be used to service n different devices?
______ type circuits are generally used for interrupt service lines
i) open-collector
ii) open-drain
iii) XOR
iv) XNOR
The resistor which is attached to the service line is called _____
CPU as two modes privileged and non-privileged. In order to change the mode from privileged to non-privileged
From amongst the following given scenarios determine the right one to justify interrupt mode of data transfer
i) Bulk transfer of several kilo-byte
ii) Moderately large data transfer of more than 1kb
iii) Short events like mouse action
iv) Keyboard inputs
How can the processor ignore other interrupts when it is servicing one
When dealing with multiple device interrupts, which mechanism is easy to implement?
The interrupt servicing mechanism in which the requesting device identifies itself to the processor to be serviced is ___________
In vectored interrupts, how does the device identify itself to the processor?
The code sent by the device in vectored interrupt is _____ long.
The starting address sent by the device in vectored interrupt is called as __________
The processor indicates to the devices that it is ready to recieve interrupts ________
We describe a protocol of input device communication below:
i) Each device has a distinct address.
ii) The BUS controller scans each device in sequence of increasing address value to determine if the entity wishes to communicate
iii) The device ready to communicate leaves its data in the I/O register
iv) The data is picked up and the controller moves to the step a
Identify the form of communication best describes the I/O mode amongst the following:
Which one of the following is true with regard to a CPU having a single interrupt request line and single interrupt grant line?
i) Neither vectored nor multiple interrupting devices is possible.
ii) Vectored interrupts is not possible but multiple interrupting devices is possible.
iii) Vectored interrupts is possible and multiple interrupting devices is not possible.
iv) Both vectored and multiple interrupting devices is possible.
Which table handle stores the addresses of the interrupt handling sub-routines?
_________ method is used to establish priority by serially connecting all devices that request an interrupt.
In daisy chaining device 0 will pass the signal only if it has _______
______ interrupt method uses register whose bits are set seperately by interrupt signal for each device.
____ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.
The anded output of the bits of the interrupt register and the mask register are set as input of: