Test: Digital Electronics - 4 - Electrical Engineering (EE) MCQ

Which of the following is incorrect?

A 3 stage Johnson counter (ring) shown in figure is clocked at a constant frequency of fc from the starting state of Q₀ Q₁ Q₂ = 101. The frequency of output Q₀ Q₁ Q₂ will be

A depletion type NMOS is operated in enhancement mode. V_p = - 4 volts. For V_GS = + 3 volts as V_DS is increased, I_D becomes nearly constant when V_ps equals

A number is expressed in binary 2's complement as 10011 decimal equivalent value is

Which one of the following is D/A conversion technique?

Assuming accumulator contain A 64 and the carry is set (1). What will accumulator (A) and carry (CY) contain after ANA A?

In INHIBIT operation

The product of which of the following gives the figure of merit of a logic family?

A JK flip flop can be converted to D flip flop by

In a 4 bit parallel in parallel out shift register A = 1, B = 1, C = 0, D = 1. The data output after 3 clock pulses is

Assertion (A): A 4 input variable logic circuit can be implemented using a 8 : 1 multiplexer.

Reason (R): When a multiplexer is used as a logic function generator, the logic design is simple.

A 6 MHz channel is used by a digital signalling system initializing four-level signals. The maximum possible transmission rate is

Data can be changed from spatial code to temporal code and vice-versa by using

Precisely 1 K byte means

In 8156, the lower times byte is addressed with 24 H, and the upper times byte with

In the CMOS inverter

Which of the following is incorrect?

Which one of the following is used to change data from spatial code to temporal code?

Which of the following needs DC forward voltage to emit light?

If a microcomputer has a 64 K memory; what is the hexadecimal notations for the last memory location?

In the given figure shows a 3 bit shift register using TTL flip flops. Initially all the flip flops are set to 0 state. After 8 clock pulses

Recommended fanout for ECL is