Test: I2C: Embedded Systems I/O - Computer Science Engineering (CSE) MCQ

Explanation: The I2C is known as inter-IC, which is developed by Philips for interfacing with the peripheral devices.

Explanation: The I2C is developed by Philips for use within the television sets.

Explanation: The I2C is the most known simple interface which is used currently. It can combine both the hardware and the software protocols to provide a bus interface which helps in the communication with many peripherals.

Explanation: The I2C bus consists of two lines which are called SDA and SCL. The master and slave devices are attached to these lines.

Explanation: The special buffer chip, P82B715 for increasing the current drive is developed by Philips.

Explanation: The SCL pin can provide the reference clock for the transmission of data but it is not a free running clock.

Explanation: The three hardware signals are START, STOP and ACKNOWLEDGE. These signals helps in the transmission of data between the slave and the masters.

Explanation: The START signal is performed by the master by making the SCL and SDA pin high.

Explanation: The START signal and ACKNOWLEDGE signals are almost similar but there exhibits a small change. The START signal is initiated by the master only but the ACKNOWLEDGE signal is a handshake between both the master and slave.

Explanation: The data is transmitted in packets with a having one or more bytes. These packets of data is also known as telegram.

Explanation: The address value helps the master to select the device and indicates what operation should be taken. If the 8th bit is logic one, read operation takes out and if it is logic zero, write operation takes out.

Explanation: For providing more addressing, an extended address is developed which possesses two bytes in which the first byte uses a special code to distinguish it from a single byte address so that the single byte and double byte address slaves can use a shared bus.

Explanation: The peripheral having small number of locations can use auto-incrementing counter for accessing the next register. But this will not be applicable in bigger memory devices.

Explanation: Combined format is an efficient method for the EEPROM because it is having a large number of registers.

Explanation: The EEPROM is having large number of registers, so auto incrementing counter will not be applicable. So there is an alternative method which uses index value that is written to the chip, prior to accessing the data. This is called combined format and this combined format uses two data transfer. One is to write the data and the other is to read.

Explanation: The peripherals which have small number of locations can use auto-increment counter within the peripheral in which each access selects the next register.

Explanation: The polling can be used along with the counter to determine the timeout value.

Explanation: The timeout value can be changed by the peripheral devices, so for a sophisticated system a combination of polling and timer is used to check for the signal n times within a predefined interval. This can avoid the bus lock.

Explanation: The collision detect technique helps to determine whether two or more masters are using the same bus in a multi master device.

Explanation: By using the bidirectional ports, each master can monitor the line and confirm its expected state and if it is not matched, a mismatch or collision had occurred which will discontinue the transmission by the master.