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Implementation of DMA - Free MCQ Practice Test with solutions, GATE CSE


MCQ Practice Test & Solutions: Test: Implementation of DMA (10 Questions)

You can prepare effectively for Computer Science Engineering (CSE) Embedded Systems (Web) with this dedicated MCQ Practice Test (available with solutions) on the important topic of "Test: Implementation of DMA". These 10 questions have been designed by the experts with the latest curriculum of Computer Science Engineering (CSE) 2026, to help you master the concept.

Test Highlights:

  • - Format: Multiple Choice Questions (MCQ)
  • - Duration: 25 minutes
  • - Number of Questions: 10

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Test: Implementation of DMA - Question 1

 Which of the following DMA is used in the IBM PC?

Detailed Solution: Question 1

Explanation: The Intel 8237 is the DMA used in the IBM PC. 8253,8254 and 8259 are timers developed by Intel.

Test: Implementation of DMA - Question 2

Which of the following have four transfer modes?

Detailed Solution: Question 2

Explanation: The Intel 8237 have four transfer modes. These are single mode, block transfer mode, demand mode and cascade mode.

Test: Implementation of DMA - Question 3

 Identify the additional transfer mode in the Intel 8237?

Detailed Solution: Question 3

Explanation: In addition to the four main transfer mode, there is a verify transfer mode which is used within the PC to create dummy addresses which is used for refreshing the DRAM.

Test: Implementation of DMA - Question 4

 Which of the following transfer mode can refresh the DRAM memory?

Detailed Solution: Question 4

Explanation: The verify address transfer mode can generate dummy addresses which is used for the DRAM refreshing.

Test: Implementation of DMA - Question 5

Which of the following is used for supporting the priority scheme?

Detailed Solution: Question 5

Explanation: The arbitration is used for providing priority to the DMA requests. The DMA request are simultaneously generating, so in order to avoid the errors, a priority scheme is necessary which is done by the arbitration scheme in the DMA controller.

Test: Implementation of DMA - Question 6

 Which of the following consist of a fully programmable DMA controller of two channels?

Detailed Solution: Question 6

Explanation: The MC68300 is developed by Motorola, which consists of a two channel fully programmable DMA controller which can support high speed data transfer.

Test: Implementation of DMA - Question 7

 Which cycle can support the burst and single transfer mode?

Detailed Solution: Question 7

Explanation: The internal cycles can be programmed to occupy the partial or complete fulfillment of the available internal bus bandwidth while the external cycles provides support to the single transfer modes and burst mode.

Test: Implementation of DMA - Question 8

Which of the following requires its own local memory and program?

Detailed Solution: Question 8

Explanation: The DMA CPU has its own address local memory and program so that it will not harm main memory bus and it is completely isolated.

Test: Implementation of DMA - Question 9

Which DMA is programmed with higher level software?

Detailed Solution: Question 9

Explanation: The DMA CPU is programmed with higher level software which is used to transfer the data and for processing it.

Test: Implementation of DMA - Question 10

Which of the following combine an MC68000/MC68020 type of processor with peripheral and DMA controllers?

Detailed Solution: Question 10

Explanation: The MC68300 combines the processors along with the DMA controllers. The processors which support the MC68300 series are MC68000 or MC68020.

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