Interfacing an 8051 to External Memory Video Lecture - Embedded Systems

hello everyone we are going to explain
the 8:05 and microcontrollers
interfacing with external room so first
of all the question arises why we need
external room the reason behind is that
some microprocessor have no or less
internal Ram and this is done by the
manufacturer itself so so that the user
can himself or herself increase the RAM
amount according to the application ok
this is the 8:05 one pin structure here
the most important pin needed for this
interfacing is EA pin it is active low
and at port 30 at the pin 31 and to
indicate that the program code is stored
in the on chip roam this pin is
connected to VCC and to indicate that
program code is stored in external room
this pin must be connected to ground the
Poteau and port 2 also play a role in
providing exon access to the external
address in 8:03 1 or 8 0 v 1 the poor 0
and 4 1 provides 16-bit address to
access the external room PU is for the
lower edge respects and P 1 for the
upper view is also used to provide 8-bit
data bus by using multiplexing called
address or data multiplexing so how to
tell pew is used for data path or
address path this is done by using the a
le pin let's address latch enable when L
is 0 it is used for data path and when L
is 1 it's used for address path so how
to extract the address from P opens by
using address or data G multiplexing by
connecting po2 a 7 for LS 3 7 3 latch
and use a leap into latch the address
here we have the sound for LS 3 7 3 D
let's diagram you can see that the the
this is the internal of this latch and
here in the left figure this latch is
used to do the demultiplexing then we
have the PSTN signal called program
store enable output signal of the extra
3 1 and the 5 1 must be connected to the
output enable pin of the room containing
the program code so 2
to enable the external room as we need
an output enable to be high or low
according to the its manufacturing so
the P SEM signal as we can see in the
next slide that this P Sen is connected
to the output enable pin of this
external room and also to the chip
enable then open off chip code Roma size
is different for different kinds of
microprocessor in system we still have
EA is equal to VCC meaning that upon
reset the 8:05 and execution the on chip
program first and then when it reaches
the end of the on should prove it
switches to external room for the rest
of the programming code here we can see
that for 8 0 3 1 and 5 1 when e is
ground it just use the off chip when is
at VCC in h0 v ER it first use the on
chip then off chip and the in 8005 2
again he is VCC and then it use the on
chip program first and then the off ship
the program size or you can say the ramp
size on this h 0 v 1 + 8 0 v 2 is shown
here that's all about the h 0 5 and
interfacing thank you