| | Lekshmi Kulkarni answered |
would be 



| | Raj Choudhary answered |


| | Siddharth Malhotra answered |
| | Sandeep Chatterjee answered |
therefore rise time will increase.
therefore stability will decrease.| | Avik Iyer answered |

| | Aman Jain answered |
(A = constant)
| | Prisha Sengupta answered |

| | Manoj Mehra answered |










| | Aryan Mathur answered |
| | Srestha Chavan answered |
| | Devansh Das answered |

| | Maulik Chatterjee answered |
| | Anuj Kapoor answered |

is increased means damping is reduced, thus steady state error reduces.
| | Mahi Bose answered |
| | Mansi Choudhury answered |
| | Vaibhav Joshi answered |
therefore higher is the damping| | Mahesh Datta answered |



| | Bijoy Nair answered |




| | Priyanka Ahuja answered |
| | Rithika Pillai answered |
| | Poulomi Ahuja answered |
| | Kalyan Patel answered |
| | Avik Saha answered |
| | Mayank Sengupta answered |
| | Deepika Deshpande answered |


| | Kajal Yadav answered |
| | Nikhil Iyer answered |


therefore| | Shaan Choudhary answered |
| | Palak Verma answered |

| | Jatin Mukherjee answered |
| | Abhishek Chauhan answered |



with a unit-step
as an input. Let c(s) be the corresponding output. The time taken by the system output c(t) to reach 94% of its steady-state value
rounded off to two decimal places, is | Imtiaz Ahmad answered |







| | Ameya Gupta answered |



| Prashanth Rane answered |









| | Abhishek Chauhan answered |
is initially at rest and is subjected to a step input signal.| | Lekshmi Choudhary answered |



| | Naveen Sharma answered |



| | Abhay Khanna answered |






| | Dhruv Datta answered |






| Sagnik Sen answered |



| | Ishan Chawla answered |







| Prashanth Rane answered |





6 Months Preparation for GATE Electrical675 videos|1390 docs|885 tests |
