Test: Emitter- Coupled Logic - Electrical Engineering (EE) MCQ

ECL is the fastest of all the logic families because of the emitters of many transistors are coupled together which results in the highest transmission rate.

ECL (Emitter Coupled Logic) can also be named as CML(Collector Mode Logic).

The ECL behaves as NOR gate because if any of the input voltages go high as compared to the reference voltage, the output is low and the output is high only when all the input voltages are low.

ECL’s major disadvantage is that each gate continuously draws current, which means it requires (and dissipates) significantly more power than those of other logic families. But ECL logic gates have clock frequency. Thus, they have a fast operation.

The equivalent of emitter-coupled logic made out of FETs is called Source-coupled logic(SCFL). Like ECL, SCL is also the fastest among the logic families.

At the time of invention, an ECL was called a current-steering logic because it involved current switching.

Low voltage positive emitter coupled logic (LVPECL) is a power optimized version of PECL using a +3.3 V instead of 5 V supply.

ECL was invented in August 1956 at IBM by Hannon S Yourke.

If the input impedance is high and the output resistance is low; as a result, the transistors change states quickly, gate delays are low, and the fanout capability is high. Fan-out is the measure of the maximum number of inputs that a single gate output can accept.

Though, the emitter and collector of the ECL are coupled together. So, the output will be taken from a collector.