Test: Sequential Logic Circuits- 1 - Electronics and Communication Engineering (ECE) MCQ

For J-K flip-flop, the output is clearly defined for all combinations of two inputs. For S-R flip-flop output is not defined when S = R = 1. A D flip-flop has only one input.

Truth table for J-K flip-flop is shown below.

When J = 1 and K = 0, output (Q⁺) is always set upon the occurrence of the active clock transition.

In a J-K flip-flop, toggle means change the output to the opposite state. A J-K flip-flop toggles when

Maximum time taken for all flip-flops to stabilize is (75 ns x 8) + 50 ns = 650 ns.
Frequency of operation must be less than

Thus, option (d) is correct.

When J = 1, K = 1 and the clock, next state will be complement of the present state. Thus,

The correct answer is 1. Both A and R are true and R is the correct explanation of A.

Explanation:

• Assertion (A): In general, asynchronous circuits are considerably faster than synchronous circuits.

  • This statement is true. Asynchronous circuits do not rely on a clock signal to synchronize operations, which allows them to process events as soon as the necessary inputs are ready, leading to potentially faster operation compared to synchronous circuits.

• Reason (R): In an asynchronous circuit, events can occur after one event is completed, and there is no need to wait for a clock pulse.

  • This statement is also true. The absence of a clock pulse in asynchronous circuits allows events to be processed immediately after the previous event is completed, without waiting for a clock cycle, which is why asynchronous circuits can be faster.

Since the reason (R) correctly explains the assertion (A), the correct answer is 1. Both A and R are true and R is the correct explanation of A.

• Combinational circuits are often faster than sequential circuits since the combinations circuits do not require memory whereas the sequential circuits need memory devices to perform their operations in sequence. Hence statement - 1 is not correct.
• in an asynchronous circuit, events are allowed to occur without any synchronisation In such a case, the system become: unstable which results in difficulties. Hence statement-2 is not correct.
• Statement-3 is correct which is the definitioi of a combinational circuit.
• in a combinational circuit, for a change if the input, the output appears immediately except for the propagation delay througt circuit gates. Thus, statement-4 is no correct.
• In a sequential circuit, an output signal is e function of the present input signals and e sequence of the past input signals i.e. the past output signals since the output signals are fed back to the input side. Hence, statement-5 is correct.
Thus, statements 3 and 5 are only correct.

A latch is memory device with the capability of storing one binary digit of information because the latch output will remain set/reset until the trigger pulse is given to change the state.
A basic latch is made up of cross coupled inverters as shown below.

Thus, both assertion and reason are true but reason is not the correct explanation of assertion.