GATE Mock Test Electronics Engineering (ECE)- 5 - Electronics and Communication Engineering (ECE) MCQ

# GATE Mock Test Electronics Engineering (ECE)- 5 - Electronics and Communication Engineering (ECE) MCQ

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## 65 Questions MCQ Test GATE ECE (Electronics) 2024 Mock Test Series - GATE Mock Test Electronics Engineering (ECE)- 5

GATE Mock Test Electronics Engineering (ECE)- 5 for Electronics and Communication Engineering (ECE) 2024 is part of GATE ECE (Electronics) 2024 Mock Test Series preparation. The GATE Mock Test Electronics Engineering (ECE)- 5 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The GATE Mock Test Electronics Engineering (ECE)- 5 MCQs are made for Electronics and Communication Engineering (ECE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for GATE Mock Test Electronics Engineering (ECE)- 5 below.
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GATE Mock Test Electronics Engineering (ECE)- 5 - Question 1

### The given question is followed by two statements: select the most appropriate option that solves the questionCapacity of a solution tank A is 70% of the capacity of tank B. How many gallons of solution are in tank A and tank B?Statements: Tank A is 80% full and tank B is 40% full Tank A if full contains 14,000 gallons of solution

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 1
Statement 1 can be used to solve the question if capacity of both tanks is already known

Statement-2 can be used if it is known what quantity of each tank is full/empty.

Therefore, by using both statements

Let capacity of tank B is x

70/100x = 14000

= x = 20000 gallons

Solution in tank A = 80/100 × 14000

= 11200 gallons

Solution in tank A = 40/100 × 20000

= 8000 gallons

∴ Total solution = 11200 + 8000

= 19200 gallons

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 2

### Which of the following is the antonym of the word SILENCE?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 2
Silence refers to 'no speech'. Babble means continuous, and sometimes incoherent speech.
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 3

### What is the value of the following expression?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 3
The given expression is

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 4

Which of the following is the synonym of the word ADMONISH?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 4
Admonish means taking someone to task for wrong doing. This is similar to warning or cautioning someone for some wrong doing.
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 5

From a group of 61 students, each student appears for at least one of the 3 papers i.e.

GATE, ESE or SSC. Out of the students appearing for SSC, the number of students appearing for ONLY SSC is equal to the number of students who also appear for GATE.

The number of students who appear for only GATE is 3 more than the number of students who appear for all 3; number of students appear for ESE alone is higher than the previous number by 5.

If 32 students appear for ESE and 36 students appear for exactly ONE exam, then the number of students appearing for all 3 exams are _____.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 5

Base on the diagram and information available,

c = f + g …(i)

a + b +c = 36

⇒ d + e + f + g = 61-36 = 25 …(ii)

a + b + c = 36

⇒ g + 3 + g + 8 + c = 36

⇒ 2g + c = 25 = 3g + f …(iii)

∵ b + d + e + g = 32

⇒ g + 8 + d + e + g = 32

⇒ d + e + g + g = 24

⇒ d + e + f + g + g = 24 + f = 25+g

⇒ f = g +1

∵ 3g + f = 25

⇒ 4g = 24

∴ g = 6

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 6

Which of the following statements cannot be inferred from the passage?

Not stagnating moment to moment is called achievement. Inward humility is achievement, outward courtesy is virtue. Establishing myriad truth in your nature is achievement; the mind being essentially detached from thoughts is virtue. Not departing from one's essential nature is achievement; acting adaptively without being affected is virtue. Continuity moment to moment is achievement; balance and directness of mental activity are virtue. Refining your own nature is achievement. Refining your own person is virtue.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 6
Going through the passage,

(1) is eliminated as it is true as per line,' Inward humility is achievement, outward courtesy is virtue' of the passage.

(2) is true as per the line ,'Refining your own nature is achievement. Refining your own person is virtue'. Hence, eliminated.

(3) can also be inferred in the last lines.

(4) is the only statement that can not be inferred,

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 7

A water tank of capacity 6000 litres is connected to 2 taps ’A’ and 'B'. Water flows from these 2 taps at 90 litres per minute and 60 litres per minute respectively.

To fill this empty tank, first tap ‘A’ is opened for sometime and once it is closed, tap ‘B’ is opened till the tank is full taking a total of 90 minutes.

What is the difference in the time (in minute) for which the taps are opened to fill the tank.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 7
Let the tap B is open for time = t1 minute.

duration of tab A is opened for '90-t1' minute.

Since the rate of inflow of water of tab A is 90 liter/minute, while the rate of inflow of water of tab B is 60 liter/minute.

So as per the given data they both fill the tank as follow

90×(90-t1) + 60 x(t1) =6000

8100-6000 = 30 t1

t1 = 2100/30 = 70 Minute

Hence Tab B is opened for 70 Minute.

It is already given that the total time of open for both tab is 90 Minute hence the duration for which Tab A is open = 90-70 = 20 Minute

Difference in time = 70-20 = 50 Minute.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 8

1/38 + 1/39 + 1/39 + 1/39 is equal to

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 8
Remember that you can only add fractions with the same denominator.

Rearrange 1/38 so that it can be added to 1/39 . That is, try and turn 1/38 into a fraction with 39 in the denominator.

Multiply 1/38 by 3/3 to get

Solving,

Canceling out a factor of 3 gives,

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 9

Which one of the following describes the relationship among the three vectors,

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 9
From the question we get

Solving this we get to know,

Vectors are linearly independent.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 10

What will be the sum of the factors of 3129?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 10
N is a number such that N = ap x bq x cr ... where a, b, c are prime number and p, q, r are positive integers.

So, sum = ;

Here a = 3, p = 129,

So required sum =.(3130 - 1)/2

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 11

The circuit below is at steady state

The sum of currents i1 and i2 (in A) is_____

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 11
Drawing equivalent circuit at steady state

Since now 25Ω and 10Ω are in parallel with 50V.

i1 = 50/10 = 5A

i2 = 50/25 = 2A

i1 + i2 = 7A

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 12

The transition capacitance of a diode is proportional to

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 12
If reverse bias voltage increases, width of the depletion layer increases and hence capacitance decreases. For a step graded junction, the width of the depletion region, W is inversely proportional to the square root of the reverse bias voltage.
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 13

The Fourier transform of the signal shown in the following figure is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 13
The given signal is x(t) = u(t+1) – u(t-4)

Differentiating both sides

d/dtx(t) = δ(t + 1) - δ(t - 4)

Taking Fourier transform on both sides

jω × (jω) = e − e−jω

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 14

In the J-K flip-flop, we have J = Q̅ and K = 1 as shown in the figure:

Assuming the flip-flop was initially cleared and then clocked for 6 pulses, the sequence at the Q output will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 14
For the circuit given,

Counting from MSB to LSB, the output will be 010101.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 15

A system is described by dy(t)/dt + 3y(t) = x(t) where x(t) is input and y(t) is output. Then the unit step response of the system is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 15
dy(t)/dt + 3y(t) = x(t)

Taking laplace transfarm

sY(s) + 3Y(s) = X(s)

Y(s) = X(s)/(s+3)

Given x(t) = u(t) ⇒ X(s) = 1/s

Y(s) = 1/s(s+3) = 1/3(1/s − 1/s+3)

Y(t) = 1 - e-3t/3

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 16

The state space equation of a system is described by

x = Ax + Bu

y = Cx

Where x is state vector, u is input, y is output and A =

A unity feedback is provided to the above system G(s) to make it a closed loop sytem as shown in figure.

For a unit step input r(t), the steady state error in the output will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 16
Steady state error is given by,

Here R(s) = (unit step input)

G(s) = 1/s(s + 2)

H(s) = 1 (Unity feed back)

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 17

The Transfer function in relation to Bode Plot given below is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 17
Sol. Starting slope of Bode Plot is –40 db/d

∴ It has term K/S2

As the initial slope intersect at w = 5

K = w2

K = 25

New for corner frequency wcf1 = 2 slope changes to –20 db/d

∴ It has zero in the transfer function having time constant

T1 = 1/ωcf1 = 1/2 = 0.5

For corner frequency cos⁡f2 = 10,slope changes from –20 db/d to – 40 db/d

∴ It contain in the transfer function having time constant

T2 = 1/ωcf2 = 0.1

∴ Transfer function = 25(1 + 0.5S)/S2(1 + 0.1S)

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 18

The Fourier series expansion of a real periodic signal with fundamental frequency f0 is given by gp(t) = . It is given that C3 = 3 + j5. Then, C-3 is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 18
Here, C3 = 3 + j5

For real periodic signal,

C-k = Ck*

Thus, C-3 = 3 - j5

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 19

Consider a spring-mass system given as where m stands for mass, c for the damper, and spring labelled as k

In the figure shown above, consider the m= 1 units, k= 6 units, c= 8 units.

Sum of all the poles and zeroes of the transfer function is:

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 19
F is the sum of the forces, and here the spring and the damper are acting in opposite directions so. Force of Spring - Force of Damper = F

fu is substituted for x and therefore duedx Separation of variables gives the next equation m(d2y/dt2) + c(dy/dt) + k(y) = c(du/dt) + k(u)

Now the function is ready to be transformed from the time domain into the frequency domain. The Laplace of d2y/dt2 and dy/dt are as follows:

L(f′′) = s2L{f) − sf(0) − f′(0)

L(f′) = s.L(f) − f(0)

Assuming zero initial conditions the equations are (m(s2) + c(s) + k)⋅Y(s) = {c(s) + k)∪(s)

Let the transfer function G(s) is defined by \Upsilon(s) / U(s\) G(s) = {c(s) + k)/(m(s2) +c(s) + k)

Substituting the values in the G(s) G(s) = (8s + 6)/(s2 + 8s + 6)

⇒ (8s + 6)/(s + 4)(s + 2)

From the numerator we have would give you a zero at s= - 3/4 and solving for s in the denominator gives poles at s = -4, -2

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 20

Consider the following circuits:

3. JK flip-flop

4. Counter

Which of the above circuits are classified as sequential logic circuits?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 20
Full adder and Half adder circuits are combinational circuits. JK flip-flop and counter are sequential circuits.
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 21

The CMOS circuit shown below implements the logic function

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 21
Operation of circuit is given below

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 22

Path of a charged particle A that enters in a uniform magnetic field B (pointing into the page) is shown in the figure.

The deflection in the path of the particle shows that the particle is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 22
Force applied by a magnetic field B on a moving charge with velocity v is defined as,

F = v x B

Since the direction of velocity v and B are perpendicular to each other as obtained from the figure shown, the resultant force will be perpendicular to both of them, i.e. the force on the moving charged particle will be in an upward direction. And as the particle is also deflected in an upward direction with the applied force, so it gives the conclusion that the particle will be positively charged.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 23

The circuit shown in figure is best described as a

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 23
This circuit having two diode and capacitor pair in parallel, works as voltage doubler.
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 24

A J-K flip-flop can be made from an S-R flip-flop by using two additional

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 24
In FF conversion, both S and R will be functions of actual external inputs (J and K) and previous O/P.

S = f1(J, K, Qn) and R = f2(J, K, Qn)

Steps:

1. List all possible combinations of J, K and Qn (000 to 111, first three columns).

2. Fill the values of Qn+1 using JK FF truth table (4th column).

3. Now, we have Qn and Qn+1 ready, so fill the values of S and R using SR excitation table.

Using K map to simplify S and R:

S = JQn and R = KQn

So, two additional AND gates required.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 25

A Mealy system produces a 1 output if the input has been 0 for at least two consecutive clocks followed immediately by two or more consecutive 1’s. The minimum state for this system is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 25
The state diagram is as shown below

There are 4 minimum state.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 26

Let P and Q be square matrices such that PQ = I, then zero is an eigen value of

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 26
We have PQ = I

Or Q = P-1 = or P = Q-1

If zero is an eigen value of any of the matrix, then other matrix will have infinity as an eigen value.

Thus, zero is not an eigen value of either P or Q.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 27

The value of ∫c|z|dz, there 'C' is the left half of the unit circle, is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 27
Given C: |Z| = 1

⇒ z = e

⇒ dz = e

and θ : π/2 to 3π/2

⇒ I = ieiθ(3π/2) - e(π/2)

∴ I = -2i

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 28

In a discrete-time complex, exponential sequence of frequency ω0 = 1, the sequence is:

1. Periodic with period 2π/ω0

2. Non periodic

3. Periodic for some value of period N

Which of the above statements is/are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 28
ω0 = 1

A discrete time complex exponential is periodic if ω0/2π is a rational number. But given ω0 = 1

ω0/2π = 1/2π = is a irrational number, so it is non periodic.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 29

Given L−1[4/s2+2s] find

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 29

Applying L Hospital rule because its 0/0 form

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 30

A germanium sample at T = 300 K is doped with donor atoms with concentration Nd = 6 x 1018/cm3. At thermal equilibrium, if the intrinsic concentration of the sample is ni = 2.4 x 1013/cm3, then the hole concentration/cm3 is ___ × 106 (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 30
n0p0 = n2i

n0 ≈ ND

p0 = (2.42 x 1026)/(6 x 1018) = 0.96 × 108/cm3 = 96 × 106/cm3

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 31

If V = x2y (z+3) v then calculate the magnitude of charge within the cube 0 < x, y, z < 1 _______ (in pC)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 31
ρv = ∇.D = εo∇ . E

= – εo (2y).(z+3)

Ψ = Qencl = ∫ρvdv = –2εo∫∫∫ y (z+3) dxdydz

Qencl = - 30.95 pC

|Q| = 30.95 pC

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 32

The absolute value of residue of the function zcos 1/z at z = 0 is (Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 32
We have f(z) = zcos1/z.

Residue of f(z) at z = 0 is the coefficient of 1/z i.e -1/2 or - 0.5.

Absolute value = 0.5

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 33

A signal x(t) = 2 cos (π104t) volts is applied to an FM modulator with the sensitivity constant of 10 khz/v. Then the modulation index of the FM wave is :

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 33

x(t) = 2 cos (π × 104t)

Modulation index (mf) = δω/ωm

= 2/π

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 34

The DTFS coefficients of a signal x[n] are shown in figure below.

The value of x[0] is _____. (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 34
We know that x[n] =

x[0] =

x[0] = – 1 + 2 + 2 = 3

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 35

Consider the given transition probability diagram of a binary symmetric channel as shown in figure. The input binary symbols 0 and 1 occur with probabilities 1/4 and 3/4 respectively

Then probabilities of binary symbols 0 and 1 appearing at the channel output are.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 35
p(x0)=1/4

p(x1) = 3/4

p(y0) = (1 − p)(1/4) + p(3/4)

=1/4 + p/2

p(yi) = p(1/4) + (1 − p)(3/4)

= 3/4 − p/2

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 36

What will be the equivalent Boolean expression for X ⊕ Y ⊕ XY, where X and Y are Boolean variables?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 36
X ⊕ Y ⊕ XY

= X + Y

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 37

Using Gauss- Seidel method , starting form [0,0,0]

x1+ x2 – x3 = 1,

x1+ 4x2 + x3 =15,

3x1+ 2x2+ 3x3= 20.

Find (2x3+ x2 – x1) after two iterations approximately.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 37

Iteration #1 [X1 X2 X3] = [0 0 0]

X1 = 1 , X2 = 3.5 , X3 = 3.333

Now, new [X1 X2 X3] = [1 3.5 3.333]

Iteration #2 [X1 X2 X3] = [1 3.5 3.333]

2x3 + x2 – x1= 9.9303

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 38

Consider the MOSFET configuration shown below.

Which of the following waveforms shows the correct relation between input and output voltage for body bias effect?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 38
Considering saturation ID = I1 = 1/2 ∝n COX W/L(Vin - Vout - VTH)2

Now as the substrate is tied to ground, body effect is significant. Then as Vin becomes positive, Vout becomes more positive, the potential difference between the source and the bulk increases, raising VTH. The above equation therefore implies that Vin - Vout must increase so as to maintain constant value.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 39

If the probability of a bad reaction from a certain injection is 0.001, and then the probability that out of 2000 individuals more than two will get a bad reaction will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 39
Probability of occurrence is very small so it will follow poisson’s distribution Mean (m)

= np

= 2000*0.001 = 2 Probability that more than 2 will get a bad reaction

= 1 - [p(0) - p(1) - p(2)]

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 40

If a matched filter is defined as s(t) = f(t) + 2f(t) δ(t – 0.5) + f(t – 2.5) * δ (t + 0.5)

(where f(t) is shown in figure below), then what will be the impulse response of matched filter h(t); 2 ≤ t < />

(Note: δ is delta function and * is convolution operator)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 40

2f(t)δ(t - 0.5) = 2f(0.5) = 2 x 1 = 2

f(t -2.5)*δ(t + 0.5) = f(t - (2.5 - 0.5))

= f(t – 2)

s(t) = f(t) + f(t - 2) + 2

h(t) = -2t + 6; 2 ≤ t ≤ 3

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 41

Consider the following figure

Initially all the counters are cleared and Y = Output Y = 1 when inputs a2 a1 a0 and b2 b1 b0 are equal. How many clock pulses are needed to get output Y = 1 again __________.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 41
All the counters are positive edge triggered counters 1 goes through the state sequence.

After 11 clock pulses the counters 2 and 3 reached same state i.e., 010.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 42

The DT system shown in the figure below is stable if

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 42
The difference equation for the given system is

y[n] – ay[n – 1] = x[n]

Impulse response h[n] = an u[n]

Above summation converges if and only if | a | < />

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 43

The Truth Table of a circuit is shown below

The Boolean expression of Z is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 43
So, we will write down the minterms of Z for which it is 1 and add them.

Then by looking the table minterms are (0,2,3,4,5)

So we will minimize it by K Map.

There is no logic given for minterms 6 & 7,so we can take it as don’t care then minimize it.

Then,Z=A+B+C̅

By the checking option we can get the option (B)

ALTERNATIVE METHOD:

In the table for only one minterms (m1) logic of Z is zero,so we can find Boolean

Expression of Z̅ then complement it.

Z̅ = A̅ B̅ C

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 44

Given the matrix A = .

Eigenvectors of matrix A are

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 44
For eigenvalues

Or (8 – λ)(2 – λ) + 8 = 0

Or ( λ – 4)(λ – 6) = 0

Or λ = 4, 6

Corresponding to λ = 4, we have

We get only one independent equation

4x1 – 4x2 = 0

Or x1/1 = x2/1 giving eigenvector [1, 1]

Corresponding to λ = 6, we have

We get only one independent equation

2x1 – 4x2 = 0

Or x1/2 = x2/1 giving eigenvector [2, 1]

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 45

Calculate the cut-off frequency f3 db for the given figure

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 45
Transfer function of the given filter can be obtain as

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 46

A parallel plate waveguide having plate separation b = 14.1mm is partially filled with two lossless dielectrics with permittivities ɛr1 = 2 and ɛr2 = 1.05.

How many TM modes can propagate through the guide at the frequency f0?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 46
As we have determined in the previous question, the value of f0 is

f0 = 12.8 GHz

and the cut-off frequency for TM1 mode is

(fc)1 = 7.52 GHz

So, the cut-off frequency for TM2 mode will be

(fc)2 = 2 (fc)1 = 15.04 GHz

Since, the operating frequency f0 is below the cut-off frequency for TM2 mode, so, TM2 mode or the higher modes cannot propagate at the frequency f0. Therefore, only one mode (TM1) can propagate at the frequency f0 through the waveguide.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 47

The output characteristics for a BJT are given below.

Determine the hybrid parameter

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 47

Firstly, the given Q-point is plotted on the transfer characteristics. Keeping VCE

constant, the change in ib is chosen along the straight line at VCEQ= 6V

Next, the corresponding change in ib by drawing horizontal lines intersecting at IB to the vertical axis.

Thus, hfe is computed as,

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 48

Consider the cascaded connection of op-amp shown below.

If R1 = R2 = 10 kΏ, C1 = 0.1μF, and C2 = 0.001μF, then the cascaded network is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 48
Given combination is high pass and low pass section.

If fH < />L then Band pass filter, if fH > fL then no pass filter.

= 145.772 which is close to 159 kHz

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 49

A GaAs laser with dimensions of 20 µm * 300 µm has a threshold density of 600 A/cm2. The active region is dA= 150 Armstrong. The electron-hole recombination time at threshold is 2 ns. The current density of 4Jth is injected into the laser. If emitted photons have an energy of 1.43 eV, then optical power emitted is _______(in mW)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 49
Given, Jth = 600A/cm2

dA = 150 Armstrong

τr = 2ns

We need to get 2-D or Areal density at threshold,

n2D = Jth∗τr/q

We would get n2D as 7.5*1012 cm-2.

Now Carrier density would be given as,

nth = n2D/dA

nth would be obtained as 5*1018 cm-3.

As the threshold is crossed, there is no further change in carrier density. Thus, as J > Jth, Electron Hole recombination is,

τr(J) = Jth/J ∗ τr(Jth)

Thus, τr(J) would have value 5*10-10 s.

Optical power produced can be found using following formula,

P = JA/q ∗ hω

Optical power is 205.9 mW.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 50

Consider a stationary stochastic signal sequence {x(n)}, with zero mean and auto correlation sequence.

What will be the prediction coefficient (a1) of the 1st order minimum mean square error predictor for ? (Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 50
The 1st order predictor is,

The coefficient a1 that minimises the MSE is found from the orthogonality of the prediction error to the prediction data.

E[e(n) x (n - 1)] = 0

E[(x(n) - a1 x (n - 1)) x (n - 1)] = 0

Φ(1) - a1 Φ(0) = 0

a1 = Φ(1)/Φ(0) = (1/2)/1 = 0.5

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 51

The open loop DC gain of unity negative feedback system with closed loop transfer function

s + 4/(s2 + 7s + 13) is ________

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 51

H(s) = 1 for unity feedback

For DC gain s = 0

So, open loop gain G(0) = 4/9 = 0.444

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 52

A magnetic core of uniform cross section having two coils (primary and secondary) wound on it as shown in figure. The no. of turns of primary coil is 5000 and no. of turns of secondary coil is 3000. If a voltage source of 12 volt is connected across the primary coil, then what will be the voltage (in V) across the secondary coil? (Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 52
Voltage, V1 = -N1dΦ/dt

where Φ is total magnetic flux passing through it.

Again, V2 = -N2dΦ/dt

Since both the coils are in the same magnetic field, so change in flux will be same for both the coils.

Comparing the equations (1) and (2), we get

V1/V2 = N1/N2

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 53

For the circuit given below, voltage signals are marked with v1(t ) and v2(t). The supply is 50Hz sinusoidal. The diode is ideal and the saturation levels of the comparator is given by +Vsat and −Vzat

Find the ratio of the magnitude of 'k' th harmonic of v1(t) and v2(t), when k is odd.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 53
The comparator will generate a bipolar square wave with voltages +Vsat and −Vsat and frequency of 50 Hz. The diode will act as a haft wave rectifier and produce a unipolar square wave of same frequency and voltages 0 and +Vsat

Thus,

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 54

An infinitely long lossy transmission line with characteristic impedance Z01 = 200Ω is feeded by a λ/2 section of 100Ω lossless transmission line as shown in figure. If a voltage generator Vsg = 4 V with an internal resistance Vg = 100Ω is applied to the whole configuration, then the average power (in mWatt) transmitted to the infinite transmission line will be ______. (Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 54
As we know, the input impedance of infinitely long lossy transmission line is equal to its characteristic impedance. So, the input impedance to line 1 will be

Zin1 = Z01 = 200 Ω

From the shown arrangement of the transmission line, it is clear that the effective load impedance for line 2 will be equal to the input impedance of line 1.

i.e. ZL2 = Zin1 = 200 Ω

Since the length of the line 2 is λ/2, so the input impedance of line 2 will be equal to its load.

i.e. Zin2 = ZL2 = 200 Ω

(l = λ/2)

Therefore, the reflection coefficient at the load terminal of line 2 is given as

Now, the input voltage of line 2 is determined by using voltage division rule as

Again, the voltage at any point on line 2 is given as

whereV0+ is voltage of incident wave β is phase constant of the voltage wave and z is distance from load. So, for z = −λ/2

= – 2 volt

Therefore, the incident average power to the line 2 is given as

So, the reflected average power at the input terminal of line 1 (load terminal of line 2) is

Thus, we get the transmitted power to the line 1 as

Pavt = Pavi - Pavr = 20 - 2.2 = 17.8 m Watt

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 55

The complex exponential Fourier series representation of a signal f(t) over the interval (0,T) is

Find the sum of component of f(t) at n = 3 and n = -3

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 55
Comparing the given with the standard form

From the given from A cos nω0t

∴ n = 3

Component of f(t) at n = 3

Similarly when n = –3

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 56

Consider the two binary random variables X and Y distributed according to the joint distributions such that

P(x = y = 0) = P(x = 0, y = 1) = P(x = y = 1) = 1/3

The entropy H(x) will be ____. (Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 56
The marginal probabilities are given by

= P(X = 0, Y = 0) + P(X = 0, Y = 1) = 2/3

Hence, H(x) =

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 57

Find the sum of Power delivered by the 2V battery source, 4A current source and 6A current source using the given electrical circuit.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 57
Assume the bottom most node to be grounded

VD = OV

∴ VA = 10V

VA – VB = 2V

VB = 8V

VC – VA = 3V

VC = 13V

Applying KCL at node B.

∴ IAB = 9A

Power delivered by 2V current source = VIAB

= 2 × 9 = 18W

Power delivered by 4A current source = VBDI

= 8 × 4 = 32 W

Power delivered by 6A current source = VCDI

= 13 × 6 = 78 L

Sum of power deliver cα = 18 + 32 + 78 = 128 W

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 58

Consider the ordinary differential equation . Given the values of y(1) = 0 and y(2) = 2, the value of y(3) is _______.

(Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 58

y(1) = 0 and y(2) = 2

Assume x = et

⇒ dx = xdt

Then, dy/dx = dy/xdt

⇒ xdy/dt = dy/dt = Dy(D = d/dt)

Putting this into ordinary differential equation,

D(D – 1)y – 2Dy + 2y = 0

[D2 – 3D + 2] = 0

Auxillary equation is m2 – 3m + 2 = 0

(m – 1)(m – 2) = 0

i.e. m = 1 and m = 2

Solution of equation y = c1et + c2e2t

⇒ Putting it as x,

⇒ y = c1x + c2x2

⇒ y(1) = 0

⇒ c1 + c2 = 0 ...(i) and y(2) = 2

⇒ 2c1 + 4c2 = 2

⇒ c1 + 2c2 = 1 ...(ii)

(ii) – (i) gives

c2 = 1

c1 = –1

⇒ y = –x + x2

Then, y(3) = –3 + 32 = 6

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 59

A 250 V rms voltage source supplies three loads as shown in figure below, where

L1: 20 kW at upf

L2: 25 kVA at 0.8 pf lag

L3: 40 kVA at 0.75 pf lag

Find the total power(kW) supplied by the source and the source p.f

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 59
Given Vs = 250 ∠0°.

I2 = 100∠ -cos-1(0.8) = ∠ -36.86 = 80 - j60 A

I3 = 160 = 160A∠ -cos-1(0.75) = 160∠ -41.4 = 120 - j105.8 A

Isource = I1 + I2 + I3

= 280 – j 165.8 = 325.4 ∠–30.63

Source Power (kω) = VI cos ϕ

= 250 × 325.4 cos 30.63 = 70 kw

Source p.f. = cos 30.63 log = 0.86 lag

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 60

Consider the op-amp circuit shown below.

If the op-amps are ideal, what will be the output voltage V0 (in volt)? (Answer up to nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 60
(V0 - 2)/2 = current in 2Ω resistance + current in 1Ω resistance.

Current in 2Ω resistance = [(2-1)/2] = 0.5 Amp

Current in 1Ω resistance = [2 - (-0.5)]/1 = 2.5 Amps

(V0 - 2)/2 = 0.5 + 2.5 = 3

V0 - 2 = 6

V0 = 6 + 2

V0 = 8 V

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 61

An antenna in air radiates a total power of 100KW so that a maximum radiated electric field strength of 12 m V/m is measured 20 km from the antenna. What would be its maximum power gain if hr = 98%

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 61

= 0.0096

Maximum power gain!

G = ηr Gd

= 0.98 × 0.0096

= 9.408 × 10–3

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 62

Consider the signal flow graph of a system shown below.

The number of feedback loops in the SFG is _____.

(Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 62

L1 = G3 H1; L2 = G1 H2; L3 = G1 G2G3 G4 H3; L4 = G1 G5 G4 H3

So, the number of feedback loops in the SFG is 4.

GATE Mock Test Electronics Engineering (ECE)- 5 - Question 63

Following are the data given for an amplifier

Noise figure = 4dB

Bandwidth = 500 kHz

Input resistance = 50 W

If the amplifier is connected to a signal source of 50W at 290 K, then the input signal voltage needed to yield an output SNR = 1 is ______________

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 63
Noise figure, Fn = (Si/Ni)/(So/No)

Given, So/No=1

But Ni = KToBn

K = Boltzman constant = 1.38×10–23 J/oK

To = Temperature (ok)

Si = Fn. kToBn

4 = 10 log10 fn

fn = (10)0.4

= 2.512

Input signal voltage,

Si = 2.512 × 1.38 × 10–23 × 290 × 500 × 103

Si = 5.026 × 10–15 V

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 64

Consider a semiconductor having following parameters:

Electron mobility, αn = 7500 cm2/V-s

Hole mobility,αp = 300 cm2/ V-s

Intrinsic concentration ni = 13.6 x 1011/cm3

The conductivity of the semiconductor will be minimum if hole concentration is ___× 1011/cm3

(Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 64

For minimum conductivity,

= 68 x 1011/cm3

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 5 - Question 65

In the given figure PDF curve of random variable is shown.

Calculate P (X ≤ 1) =

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 5 - Question 65
From the property of PDF as

= 0.375

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## GATE ECE (Electronics) 2024 Mock Test Series

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