Test: Accessing I/O Devices

QUESTION: 1

In memory-mapped I/O ____________

A.
The I/O devices and the memory share the same address space
B.
The I/O devices have a seperate address space
C.
The memory and I/O devices have an associated address space
D.
A part of the memory is specifically set aside for the I/O operation

Solution:

Answer: a
Explanation: Its the different modes of accessing the i/o devices.

QUESTION: 2

The usual BUS structure used to connect the I/O devices is

A.
Star BUS structure
B.
Multiple BUS structure
C.
Single BUS structure
D.
Node to Node BUS structure

Solution:

Answer: c
Explanation: BUS is a collection of address,control and data lines used to connect the various devices of the computer.

QUESTION: 3

In intel’s IA-32 architecture there is a seperate 16 bit address space for the I/O devices?

A.
False
B.
True

Solution:

Answer: b
Explanation: This type of accessing is called as I/O mapped devices.

QUESTION: 4

The advantage of I/O mapped devices to memory mapped is

A.
The former offers faster transfer of data
B.
The devices connected using I/O mapping have a bigger buffer space
C.
The devices have to deal with fewer address lines
D.
No advantage as such

Solution:

Answer: c
Explanation: Since the I/O mapped devices have a seperate address space the address lines are limited by amount of the space allocated.

QUESTION: 5

The system is notified of a read or write operation by

A.
Appending an extra bit of the address
B.
Enabling the read or write bits of the devices
C.
Raising an appropriate interrupt signal
D.
Sending a special signal along the BUS

Solution:

Answer: d
Explanation: It is necessary for the processor to send a signal intimating the request as either read or write.

QUESTION: 6

To overcome the lag in the operating speeds of the I/O device and the processor we use

A.
BUffer spaces
B.
Status flags
C.
Interrupt signals
D.
Exceptions

Solution:

Answer: b
Explanattion: The processor operating is much faster than that of the I/O devices , so by using the status flags the processor need not wait till the I/O operation is done. It can continue with its work until the status flag is set.

QUESTION: 7

The method of accessing the I/O devices by repeatedly checking the status flags is

A.
Program-controlled I/O
B.
Memory-mapped I/O
C.
I/O mapped
D.
None of the mentioned

Solution:

Answer: a
Explanation: In this method the processor constantly checks the status flags , and when it finds that the flag is set it performs the appropriate operation.

QUESTION: 8

The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is

A.
Exceptions
B.
Signal handling
C.
Interrupts
D.
DMA

Solution:

Answer: c
Explanation: This is a method of accessing the I/O devices which gives the complete power to the devices, enabling them to intimate the processor when they’re ready for transfer.

QUESTION: 9

The method which offers higher speeds of I/O transfers is

A.
Interrupts
B.
Memory mapping
C.
Program-controlled I/O
D.
DMA

Solution:

Answer: d
Explanation: In DMA the I/O devices are directly allowed to interact with the memory with out the intervention of the processor and the transfres take place in the form of blocks increasing the speed of operaion.

QUESTION: 10

The process where in the processor constantly checks the status flags is called as

A.
Polling
B.
Inspection
C.
Reviewing
D.
Echoing

Solution:

10 Questions MCQ Test Computer Architecture & Organisation (CAO) | Test: Accessing I/O Devices

In memory-mapped I/O ____________

The usual BUS structure used to connect the I/O devices is

In intel’s IA-32 architecture there is a seperate 16 bit address space for the I/O devices?

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