Test: Basic FET Circuits - Electronics and Communication Engineering (ECE) MCQ

In the circuit shown in fig. the transistor parameter are as follows:

Que:

V_GS =?

In the circuit shown in fig. the transistor parameter are as follows:

Que: I_D = ?

The parameter of the transistor in fig.  are V_TN = 1.2 V, K_n = 0.5mA / V² and λ = 0. The voltage V_DS is

The parameter of the transistor in fig. are V_TN = 0.6  V  and K_n = 0.2 mA / V² . The voltage V_S is

In the circuit of fig. the transistor parameters are V_TN = 1.7 V and K_n = 0.4mA / V².

If I_D = 0.8 mA and V_D = 1 V, then value of resistor R_S and R_D are respectively

In the circuit of fig. the PMOS transistor has parameter V_TP = 1.5 V, k_p' =  25 μA/V² , L = 4 μm and λ = 0.If I_D = 0.1 mA and V_SD = 2.5 V, then value of W will be

The PMOS transistor in fig. has parameters

The parameters for the transistor in circuit of fig. are V_TN = 2 V and K_n = 0.2mA / V². The power dissipated in the transistor is

Consider the circuit shown in fig.

The both transistor have parameter as follows

V_TN = 0.8V, k_n' = 30 μA/V²

Que: If the width-to-length ratios of M₁ and M₂ are

(W/L)₁ = (W/L)₂ = 40

The output V_o is

Consider the circuit shown in fig.

The both transistor have parameter as follows

V_TN = 0.8V, k_n' = 30 μA/V²

Que: If the ratio is (W/L)₁ = 40 and (W/L)₂ = 15, then v₀ is

In the circuit of fig. the transistor parameters are V_TN =1 V and k_n' = 36 μA/ V² .If I_D = 0.5 mA, V₁ = 5 V and V₂ = 2 V then the width to-length ratio required in each transistor is

The transistors in the circuit of fig. have parameter  V_TN = 0.8V, k_n' = 40 μA/V² and λ = 0 .The width-to-length ratio of M₂ is (W/L)₂ = 1. If V_o = 0.10V when v_i = 5 V, then (W/L)₁ for M₁ is