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# Test: Digital Electronics - 1

## 25 Questions MCQ Test Digital Electronics | Test: Digital Electronics - 1

Description
This mock test of Test: Digital Electronics - 1 for Electrical Engineering (EE) helps you for every Electrical Engineering (EE) entrance exam. This contains 25 Multiple Choice Questions for Electrical Engineering (EE) Test: Digital Electronics - 1 (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Digital Electronics - 1 quiz give you a good mix of easy questions and tough questions. Electrical Engineering (EE) students definitely take this Test: Digital Electronics - 1 exercise for a better result in the exam. You can find other Test: Digital Electronics - 1 extra questions, long questions & short questions for Electrical Engineering (EE) on EduRev as well by searching above.
QUESTION: 1

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QUESTION: 2

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QUESTION: 3

### In the given figure assume that initially Q = 1 with Clock Pulses being given, the subsequent states of Q will be Solution:
QUESTION: 4

If Vin is 0.99 V, what is the digital output of the ADC0801 after INTER goes low?

Solution:
QUESTION: 5

Which of the following operation are performed on linear queues?

1. Testing a linear queue for underflow
2. Enqueue operation
3. Dequeue operation
4. Testing a linear queue for overflow.
Select the correct answer using the codes given below the lists
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QUESTION: 6

As access time is decreased, the cost of memory

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QUESTION: 7

A 2 bit binary multiplier can be implemented using

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QUESTION: 8

Assertion (A): Hamming code is commonly used for error correction

Reason (R): In Hamming code the number of parity bits increases as the number of information bits increases.

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QUESTION: 9

A microcomputer has memory locations from 0000 to FFFF, each storing 1 byte. How many bytes can be the memory store?

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QUESTION: 10

Typical size of digital IC is about

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QUESTION: 11

In 8085, usually the vector location and the next two memory location contain a JMP instruction. This allows the programs to branch to

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QUESTION: 12

A clock signal coordinates the working of different flip flops.

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QUESTION: 13

The rate of change of digital signals between High and Low level is

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QUESTION: 14

In a positive-edge-triggered JK flip-flop, a low J and a low K produce __________ state. A high __________ on the rising edge of the clock.

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QUESTION: 15

In which of these does thermionic emission occur?

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QUESTION: 16

Find the decimal value of 111001:

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QUESTION: 17

Which of the following is best suited for parity checking and parity generation?

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QUESTION: 18

In the circuit shown below, the outputs Y1 and Y2 for the given initial condition Y1 = Y2 = 1 and after four input pulses will be Solution:
QUESTION: 19

The op amp is used in

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QUESTION: 20

Assertion (A): Power drain of CMOS increases with operating frequency

Reason (R): All unused CMOS inputs should be tied either to a fixed voltage level (0 or VDD) or to another input.

Solution:
QUESTION: 21

For the logic circuit of the given figure the simplified Boolean expression is Solution:
QUESTION: 22

In two level logic, logic race does not occur.

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QUESTION: 23

A digital clock uses __________ chip

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QUESTION: 24

Which of the following conversion is incorrect?

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QUESTION: 25

The contents of stack location 2109 H after the call operation will be Solution: