Test: Microprocessor & Digital Logic Families - Electrical Engineering (EE) MCQ

GRT : MOV M, B
FNSH : HLT

This program find the larger of the two number stored in location 4A00H and 4A01H and store it in memory location 4A002.

A7H > 98H Thus A7H will be stored at 4A02H.

Operand R, M or implied : 1–Byte instruction
Operand 8–bit : 2–Byte instruction
Operand 16–bit : 3–Byte instruction

3–Byte instruction are: LXI, LDA, JZ, JC, JMP
P–Byte instruction are : MOV, CMP, HLT

Hence memory = 3 x 6 + 1 x 5 = 23 bytes

All instruction clear the accumulator

The instruction XRA will set the Z flag. LXI and DCX does not alter the flag. Hence this loop will be executed 1 times.

The contents of bit D₇ are placed in bit D₀

RAL instruction rotate the accumulator left through carry.

RRC instruction rotate the accumulator right and D₀ is placed in D₇ .

This program multiply BYTE1 by 10. Hence content of A will be 46H.

07H = 07₁₀ , 7 x 10 = 70, 70₁₀ = 46H

Contents of Accumulator A = 0011 0010

After First RRC = 0001 1001
After second RRC = 1000 1100

If either one or both the inputs are V(0) = 0 V the corresponding FET will be OFF, the voltage across the load FET will be 0 V, hence the output is V_DD . If boths inputs are V(1) = V_DD, both M₁ and M₂ are ON and the output is V(0) = 0 V. It satisfy NAND gate.

If both the inputs are at V(0) = 0 V, the transistor M₁ and M₂ are OFF, hence the output is V(1) = V_DD  . If either one or both of the inputs are at V(1) = V_DD  , the corresponding FET will be ON and the output will be V (0) = 0 V. Hence it is a NOR gate.

If all inputs A, B and C are HIGH, then input to invertor is LOW and output Y is HIGH. If all inputs are LOW, then input to inverter is also LOW and output Y is HIGH. In all other case the input to inverter is HIGH and output Y is LOW.

The operation of circuit is given below

The operation of this circuit is given below :