Test: Serial Port & Serial Peripheral Interface - Computer Science Engineering (CSE) MCQ

Explanation: The serial ports are considered to be the pin efficient method of communication between other devices within an embedded system.

Explanation: The time taken for the data transmission within the system depends on the clock frequency and the number of bits that are transferred.

Explanation: Most of the serial ports uses a FIFO buffer so that the data is not lost. The FIFO buffer is read to receive the data, that is, first in first out.

Explanation: The serial parallel interface bus is a commonly used interface which involves master slave mechanism. The shift registers are worked as master and the slave devices are driven by a common clock.

Explanation: The serial peripheral interface allows the full duplex synchronous communication between the master and the slave devices. MC68HC05 developed by Motorola uses SPI for interfacing the peripheral devices.

Explanation: The MC68HC05 and MC68HC11 microcontrollers uses the serial peripheral interface for the peripheral interfacing.

Explanation: The serial peripheral interface follows a master slave mechanism in which the data is written to the SPDR register in the master device and clocked out into the slave device SPDR by using a common clock signal called SCK.

Explanation: The interrupts are locally generated when 8-bits are transferred so that the data can be read before the next byte is clocked through.

Explanation: The slave select signal selects which slave is to receive data from the master.

Explanation: The SPI uses an eight clock time period for the slave to receive the interrupt and transfer the data which determines the maximum data rate.