The function
can be written as
The Karnaugh map for the Boolean function F of 4 Boolean variables is given below where A, B, C are don't care conditions. What values of A, B, C will result in the minimal expression?
From the given kmap we can observe that B = 1 always. Also if A is to be paired than it should be
1. If A is selected there is no need to take C.
Hence, A  1, B = 1, C = 0 Hence option (d) is correct
Let f(A, B) = then simplified from of the function
Consider the circuitshown below. Each of the control inputs, C_{0} through C_{3}, must be tied to a constant, either ‘0’ or '1'.
What are the values of C_{0} through C_{3} that would cause F to be the exclusive OR of A and B?
The output of
Write the minimized expression of the function of three variables that is 1 if the third variable is equal to the OR of the first two variable, 0 otherwise
Constructing the table we have
Hence the required expression is
Which of the following functions implements the Karnaugh map shown below?
Solving the given Kmap we have
Hence (b) is correct option
The Boolean expression for the shaded area in the given Venn diagram is
Hence, the required boolean expression is
Hence (b) is the required option.
The Boolean expression is a simplified version of expression:
Then which of the following choice is correct:
1. Don’t care conditions don’t exist.
2. Don’t care conditions exist.
3. D (16, 18, 20, 23, 27, 29) is the set of don’t care conditions.
4. D (16, 20, 22, 27, 29) is the set of don’t care conditions.
Only (c) option satisfies the required condition.
The logical expression for KMap shown above is:
The Boolean expression for the shaded area in the Venn diagram is
Consider, a four variable Boolean function, which contains half the number of minterms with odd number of 1 ’s. Then the Boolean can be realized with variables A, B, C, D as:
Constructing the Kmap we have
Hence the required output is
Consider
the Y is equivalent to:
An XY flipflop, whose characteristic table is given below, is to be implemented using a JK flipflop. This can be done by making
The JK fiipflop can be implemented by making , K = x
Which is true
Hence (d) is correct option.
For what logic gate, the output is complement of the input?
By using NOT gate output is complement of input
The NAND can function as a NOT gate if
NAND gate work as NOT if inputs are connected together i.e.
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