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The output of the circuit shown in following figure is equal to
The circuit given in figure is to be used to implement the function What is the values should be selected I and J?
Minimum number of NAND gates required to implement sum in halfadder circuit is:
The following circuit is an implemented of:
1. Sum of full adder
2. Carry of half adder
3. Difference of full subtracte
The circuit below represents function X{A, B, C, D) as:
If half adders and full adders are implemented using gates, then for the addition of two 17 bit numbers (using minimum gates) the number of half adders and full adders required will be
To realize following function 'f'
How many minimum number of 2 input NAND gates are required
Minimum number of 2 x 1 multiplexers required to realize the following function, Assume that inputs are available only in true forr and Boolean constants.1 and 0 are available.
The number of full and halfadder required to add 16bit numbers is
How many 3to8 line decoders with an enable input are needed to construct a 6to64 line decoder without using any other logic gates?
The following circuit implements a twoinput AND gate using two 21 multiplexers.
What are the values of X_{1} X_{2}, X_{3}?
Consider excess3 code that is used to represent integers 0 through 9 as shown below:
Which of the following expressions is the correct one for an invalid code?
What logic function is performed by the circuit shown below:
55 docs215 tests

55 docs215 tests
