A 32-bit address bus allows access to a memory of capacity
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Which of the following lists memory types from highest to lowest access speed?
According to temporal locality, processes are likely to reference pages that ____.
In caching system, the memory reference made in any short time interval tend to use only a small fraction of the total memory is called ______ .
Consider an (n + k) bit instruction with a k-bit opcode and single n-bit address. Then this instruction allow_______operations and_______ addressable memory cells.
Which of the following statements is false about dynamic RAM?
Which of the following statements is false with regard to fully associative and direct mapped cache organizations?
63 videos|8 docs|165 tests
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63 videos|8 docs|165 tests
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