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Gate Mock Test: Electrical Engineering(EE)- 13


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65 Questions MCQ Test GATE Electrical Engineering (EE) 2023 Mock Test Series | Gate Mock Test: Electrical Engineering(EE)- 13

Gate Mock Test: Electrical Engineering(EE)- 13 for GATE 2022 is part of GATE Electrical Engineering (EE) 2023 Mock Test Series preparation. The Gate Mock Test: Electrical Engineering(EE)- 13 questions and answers have been prepared according to the GATE exam syllabus.The Gate Mock Test: Electrical Engineering(EE)- 13 MCQs are made for GATE 2022 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Gate Mock Test: Electrical Engineering(EE)- 13 below.
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Gate Mock Test: Electrical Engineering(EE)- 13 - Question 1

There are two lines made by joining points A, B, C. B lies between the line joining A and C. Is the distance between the A and C passes through the B more then 7 Km.

I. The distance between A and B is 6 Km

II. Distance between B to C is 7 Km long,

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 1 From Statement I

We know the distance between Points B and C but we do not know about the distance between A and B

Statement II

This statement tells us about the distance between A and B and by using Both statement we can calculate the distance between A and C that is longer than the 7 Km.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 2

Comprehension:

Direction: In the given question, a word/phrase is given followed by three statements; I, II and III. Choose the pair of sentences which can be combined using the given word/ phrase when used at the beginning of the new sentence.

And

I: When Lionel Messi, Ronaldo and Neymar kick and dribble the football, they don’t remain confined to Argentina, Portugal or Brazil, respectively.

II: Let the entire world realise that through sports, especially football, we all can cement our bonds, wash away our bitterness and prejudices.

III: Live with a greater sense of closeness and joy with each other.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 2 ‘And’ is used as a conjunction here which is used to introduce an additional comment or interjection.

Here sentences II and III are displaying same sense that is realizing the benefit of football in our lives whereas sentence I is providing entirely different aspect of football as a sport.

Hence option (B) will be the most appropriate choice.

New sentence: Let the entire world realise that through sports, especially football, we all can cement our bonds, wash away our bitterness and prejudices, and live with a greater sense of closeness and joy with each other.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 3

Which of the following is the MOST SIMILAR in meaning to Accreditation?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 3 Accreditation = an acknowledgement of a person's responsibility for or achievement of something.

Certification = an official document attesting to a status or level of achievement.

Meticulous = showing great attention to detail; very careful and precise.

Lurid = very vividly shocking.

Suppressive = tending or acting to suppress.

Agreement = harmony or accordance in opinion or feeling.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 4

In how many ways can you place 2 white bishops on an empty chess board?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 4 One white bishop can be placed on any of the 32 white boxes and the other white bishop can be placed on any of the 32 black boxes.

Ways of doing that = 32C1 × 32C1

= 32 x 32 = 1024

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 5

Comprehension:

Direction: In the question below are given statements followed by some conclusions. You have to take the given statements to be true even if they seem to be at variance with commonly known facts. Read all the conclusions and then decide which of the given conclusions logically follows from the given statements disregarding commonly known facts.

Question:

Statement:

No physics is maths.

Some chemistry is maths.

All sciences are chemistry.

Conclusion:

I. No science is physics.

II. Some physics are science.

III. Some physics are chemistry.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 5 The least possible Venn diagram for the given statements is as follows.

Conclusions:

I. No science is physics → False (It is possible but not definite).

II. Some physics are science → False (It is possible but not definite)

III. Some physics are chemistry → False (It is possible but not definite)

Conclusion I and II form complementary pair.

Hence, either conclusion I or II follows.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 6

Comprehension:

Direction: Read the information carefully and give the answer of the following questions-

(This pie chart shows the percentage of students appear in six different exams in 2016)

Question:

This bar graph shows the percentage of failed students which appear in these six different exams in 2016)

If in 2016, total number of failed students in exam F was 4080, then how many passed students appears in the exam B?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 6 14280 ( Let total number of students be = 100z.

Total number of students appears in exam F = 16% of 100z = 16z;

Total number of failed students in exam F = 30% of 16z = 4.8z = 4080;

=> z = 850;

Total number of passed students appears in the exam B = (100 – 30)% of 24% of 100z = 16.8z = 16.8 × 850 = 14280 ;

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 7

Comprehension:

Direction: Two sentences with two blanks in each, followed by five alternatives with two words in each, are given. Choose that option as the answer which can fill both the blanks of both the sentences.

Question:

i. A sinking feeling of panic ________ over them and a temporary paralyzing fear engulfed them ________.

ii. Being a cleanliness freak, she ________ the floor and went down to the market only after the house was _________ clean.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 7 ‘Sweep’ is to clean (an area) by brushing away dirt or litter. It fits the first blank of the second sentence, as the subject is cleaning the floor. Further, ‘sweep over’ means to overcome or overwhelm, thus fits in the first blank of the first sentence. The second blank of both the sentences can be filled by "completely", thus conveying an appropriate sense.

Thus, option D is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 8

Comprehension:

Direction: Five statements are given below, labelled 1, 2, 3, 4 and 5 which are supposed to be in a logical order. A statement labelled P is given thereafter. P can replace one of the five statements such that the four statements along with P would make a coherent paragraph. You have to identify which statement should P replace and then the find out the correct sequence from the options. If the five options are in logical order and form a coherent paragraph/passage, choose the fifth option “12345”.

Question:

1) The future of Germany’s coalition government is hanging in the balance after the country’s interior minister reportedly announced his intention to resign over a migration showdown with Angela Merkel.

2) Horst Seehofer, who is also leader of the Christian Social Union, on Sunday night offered to step down from his ministerial role and party leadership in a closed-door meeting in which he and fellow CSU leaders had debated the merits of the migration deal Merkel hammered out with fellow European Union leaders in Brussels.

3) But with CSU hardliners believed to have tried to talk the combative interior minister into staying, a press conference was postponed until Monday, with Seehofer seeking to go back to Merkel in search of a final compromise.

4) At a 2am media conference, Seehofer said he had agreed to meet again with Merkel’s party before he made his decision final.

5) “We’ll have more talks today with the CDU in Berlin with the hope that we can come to an agreement,” Seehofer said.

P. Merkel said on Sunday she wanted the CDU and its Bavarian allies to continue working together.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 8

The paragraph talks about the issues pertaining to the state of coalition government in Germany. The first sentence introduces the issue to us. The second sentence explains the problem. The third sentence then goes on to elaborate upon the meeting, and the fourth and fifth sentence talk about the current state and measures being taken. Thus, they are in perfect order. Sentence P is completely out of place here because CDU is not the subject of this paragraph and it does not matter what Merkel thinks they should do.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 9

4 identical solid spheres are melted and re-formed into a solid hemisphere. Then, the ratio of the curved surface area of the hemisphere to half of the surface area of a single sphere is -

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 9 Let radius of sphere be ‘r’ and radius of hemisphere be ‘R’.

Then, ATQ,

Volume of Spheres = Volume of Hemisphere

4 x (4/3)πr3 = (2/3)πR3

Or, R / r = (8)1/3 = 2 …(1)

C.S.A of hemisphere = 2πR2

And, Surface area of sphere = 4πr2

ATQ,

2πR2 :( ½) of 4πr2

= 2πR2 :2πr2 = R2 :r2 {using (1)}

= 4 :1

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 10

A study of people who reduced the calories they consumed has found the strongest evidence yet that such restrictions slow down metabolism, raising hopes that a low calories lifestyle or treatments stimulating biological effects of restricted eating, could prolong health in old age. The report provides the most robust evidence to date that everything we have learnt in other animals can be applied to humans.

Which of the following argument will prove that the above conclusion is flawed?

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 11

A single core cable has a conductor diameter of 2 cm and an overall diameter of 4 cm. If the resistivity of the insulating material is 8×108 megohm-cm while the length of the cable is 2km then calculate the insulation resistance of this cable?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 11 L= 2 km= 2×105 cm

r1= d1/2 = 1 cm

r2 = 2 cm

ρ= 8×108 megohm-cm = 8×1014 ohm-cm

(r2/r1) = 2/1 = 2

Rinsulation = (2.3ρ/2πl)× log(r2/r1)

= (2.3×8×1014/2π×2×105) × log 2

= 440.7097 MΩ ≈ 440.71 MΩ

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 12

Which of the following conditions are correct for the convergence of the fourier transform of the function x(t).

1) x(t) is absolutely integrable over the range of time period.

2) x(t) should have finite number of discontinuities within any finite interval.

3) x(t) should have finite number of maxima and minima within any finite interval.

4) x(t) must be periodic.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 12 Dirichlet’s Conditions

The conditions under which a periodic function f(t) can be expanded in a convergent Fourier Series, are known as Dirichlet’s conditions. These are as follows:

i) f(t) is a single-valued function.

ii) f(t) has a finite number of discontinuities in each period T.

iii) f(t) has a finite number of Maxima & Minima in each period T.

iv) The Integral exists and is finite or in other way,

1, 2 & 3 are the Dirichlet conditions.

Periodicity is not the necessary condition for the convergence of Fourier transform. Since an a periodic signal may be looked at as a periodic signal with an infinite period. Note what follows is not a mathematically rigorous exercise, but will help develop an intuition for the Fourier Transform for a periodic signals.

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 13

Find the series equivalent inductance of the network that causes an opposite angle (Hays bridge) to null with the following bridge arms.

ω = 3000 rad/sec, R2 = 10 kΩ

R1 = 2 kΩ, C1 = 1 μF, R3 = 1 kΩ

The value of Lx in Henry will be


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 13

From bridge balance condition

Rad . Rbc = Rab . Rcd

Separating real and imaginary part, we have

By putting the values in above equation.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 14

The Taylor series expansion of 3 sin x + 2 cos x is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 14

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 15

The above circuit shown above will behave as:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 15 For positive half cycle.

When (vi > 10V)

D will be ON

∴ V0 = 10V

So, the circuit will behave as a peak clipper.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 16

The loop transfer function of a system is given by The total number of root loci is:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 16 Total no of root loci = max(no of poles, no of zeros)=max(4,5)=5.

Thus, option D is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 17

Given below is arrangement of different counters the input frequency of clock is f0 and the output frequency is f0/n. The value of n will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 17 Frequency at output of counter =

For n bit ring counter no. of states = 2n

For n bit synchronous counter no. of states =2n

For n bit Johnson counter no. of state =2n

∴ Frequency at output

N = 256

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 18

The no load voltage of a transformer is 440 V and its load current is 10 A. If the equivalent resistance & reactance are 0.12 Ω and 2.42 Ω and is operating at a power factor of 0.8 lagging, then find the % voltage regulation of the transformer.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 18 ϕ=cos−1⁡0.8=36.86

Full load alg. can be calculated as-

V2=E2−I2∠⟶×(R2+jX2)=440−10∠−36.86(12+j2.42)=V2=424.93∠−2.51∘V

Required equation

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 19

A p-channel JFET has VP=4V and IDSS=12mA. It is used in the circuit of figure given below with VDD=12V. Determine RD and RSso that ID=4mA and VDS = 6V

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 19

Given, VGS=ISRS=IORS...........(1)

Substituting value in equations (1) and (2)

VGS = 4Rs

Solving we get Rs =1.58kΩ or 0.42kΩ

(smaller value selected)

KVL for OD loop−12−6+(RD+RS)=0

R0=6.08KΩ

Rs = 0.22KΩ

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 20

Which of the following plot represents the magnitude of transfer function versus frequency of the circuit shown in figure.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 20

Transfer function of the circuit is given as following

This is high pass filter, so the response is shown in figure below

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 21

For the flip flop configuration as shown above for clock input to T flip flop. The mod of the above flip flop configuration will be _______.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 21

For D flip flops. Q2 and Q1 are outputs and clock Q0 from T flip flop is applied.

∴ Truth table for D flip flop:

So mod of D flip flops will be 4

The mod of T flip flop is 2.

So equivalent mod = 2 × 4 = -8= 8

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 22

A compound DC generator is supplying a load and working as cumulative generator. If now machine behave as a motor, it will behave as:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 22 Cumulative compound DC generator

As it is cumulative compound gen, that means series flux is in phase with shunt flux.

Now it runs as a motor.

Shunt field is same, but series flux opposes.

Hence, series flux opposes shunt flux.

It will run as differentially compound motor.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 23

Which one is increased when of negative feedback voltage is applied to an amplifier?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 23

Feedback reduces the overall gain of the system negative feedback increases the input impedance and decreases the output impedance.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 24

A circular disc of radius 5 m with a charge density of ρs = 12 sinϕ μC/m2 is enclosed by a surface S. The net flux crossing the S is.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 24

The net flux crossing,

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 25

For IOL (max) = 16mA, IIL(max) = 0.0016 A. The fan-out (low) will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 25

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 26

Two continuous time system is described as x1 (t)=te-t u(t) and x2 (t)=te-2t u(t), then the convolution of x1(t) & x2(t) will be?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 26

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 27

What will be the time constant of the given circuit:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 27 Time constant =

The circuit can be redraw as

Leq = [(2||2) + 2] H = 3 H

To find Req,

• Open circuit current source

• Short circuit voltage source

Find out Req across Leq:

Req=10Ω

Time constant =

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 28

Which feedback topology is employed in the amplifier circuit below?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 28 In the given amplifier circuit, RE’ provides the negative feedback. RE’ is not directly connected to output node, hence current sampling and it is not directly connected to input node, hence series mixing.

Thus, option C is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 29

Boolean expression , its maxterm form is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 29 Min term expression

Using De Morgan's law

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 30

For a unity negative feedback system with the forward transfer function Find the sum of maximum and minimum value of K to make the system stable.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 30 The transfer function in the following case is defined as

On substituting the value of G(s), we have T(s) = On simplifying we have

Applying R-H criteria,

First of all k > 0 for R - H criteria to be valid

Clearly, 6 − 3k > 0 in order for the system, to be stable. K < />

Thus, sum of maximum and minimum value of k is = 2

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 31

A linear time invariant system is described by the following dynamic equation.

The system is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 31

c|= 0, condition for controllability: [BABA2B]

So, it is controllable system.

Condition for observability.

c|=−2+2=0 hence it is unobservable system

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 32

A 3-ϕ, 50 Hz, synchronous generator has rating 150 MVA. The kinetic energy of the machine at synchronous speed is 600 MJ. The machine is running steadily at synchronous speed and delivering 40 MW power at power angle of 15 electrical degrees. If load is suddenly removed, assuming the acceleration is constant for 8 cycles, the value of power angle after 5 cycle is _______ electrical degrees.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 32

Pe=40MW

KE=600MJ

time period for 5 cycle is

According of the swing equation,

Where, Pa= accelerating power, Pa=40 MW

Now, Integrating twice,

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 33

A 3-ϕ semi-converter feeds power to a resistive load of 8 Ω. For a firing angle delay of 30°, the load takes 4 kW. The load current is made ripple free by connecting suitable inductor at load. Find the per phase input voltage.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 33

since load current is constant and ripple free.

So, load power is given by

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 34

The root locus diagram of a unity feedback control system with loop transfer function as is intersecting the line ξ = 0.707 which is shown in figure below. The value of K at intersection of ξ=0.707 line and root locus is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 34 The root locus diagram is

cos⁡θ=ξ

θ=cos−1⁡(0.707)

θ=49∘

The intersection point is ′s′=−1+j1

since, point lies on the root locus, so

|G(s)H(s)|=1

K=(−1+j1)(1+j1)

K = 2

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 35

A 4kVA 3-∅, 110V, 50Hz star connected salient pole alternator has Xd=3Ω and Xq=2Ω. The machine id delivering full load current at 0.8pf lag at rated voltage. The power output of the alternator is ………………kW [Write the answer upto two decimal point]


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 35

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 36

If the initial approximation is x0=2.5 then the first approximation of (15)(1/3) using Newton Raphson method is …………….. [Write the answer upto two decimal points]


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 36

Let

x=(15)⅓

⇒x3=15

⇒x3−15=0

Let f(x) = x3 - 15 = 0

Using Newton Raphson formula

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 37

ABCD parameters of 3 φ transmission line are A = D = 0.9∠2.5 °, B = 150∠81 °Ω and C = 0.05∠92.6 °S. If the sending end voltage is 450 kV, then the receiving end voltage under no load condition is _______ kV.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 37

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 38

For the element values given in the circuit, and the initial current through the inductor is iL (0- )=50Amps. Initial voltage across the capacitor vC (0- )=100V. The values of conduction time of thyristor and capacitor voltage after thyristor is turned OFF are

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 38

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 39

The region x<0 carries="" a="" perfect="" dielectric="" for="" which="" εr1="2.0," while="" the="" region="" x="">0 is characterized by εr2=4.0. If in the given medium

1, then what will be the electric field density

in medium 2?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 39

According to boundary conditions

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 40

A 100KM, 550KV line has a series reactance of 0.45Ω/KM and power transmitted is 1050MW. It is connected to a source bus which has a short circuit capacity of 5050MW. Determine the source voltage when the load is disconnected to load power factor of 0.8 lag.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 40

Assuming base voltage of 550KV and base power of 1050MW

The base impedance is= 550×550/1050= 288.9052Ω

Per unit reactance of the line = 0.45×100/288.905=-0.156pu

SC capacity of source bus= 5050MW

The equivalent pu Thevenin’s source impedance= 1050/5050=0.208pu

Total reactance of the system= 0.208+0.156= 0.364pu

Let V=1PU=550KV

P=1PU=1050MW

For unity power factor= 0.8

Qr=Prtanɸ= 0.75pu

Eth= V+ (Qr/V)X + j(Pr/V)X

Eth=1+ (0.75/1)×0.364 + j(1/1)×0.364

Eth= 1.273+j0.364

Eth= 1.32∟(15.96˚)

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 41

In the amplifier circuit shown in figure, the MOSFET has IDSS=6mA,Vp=-3V and rd=30kΩ . The voltage gain and Ri of the amplifier respectively are

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 41

DC analysis

The given circuit is a CS amplifier. So small signal model

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 42

A moving coil ammeter has a moving coil of dimensions 20 mm × 15 mm with 150 turns. If a current of 4 mA is applied to the coil, find the angular deflection (in degree) of the pointer. The flux density in the air gap is 1.6 × 10-3 Wb/m2 and the spring constant is 0.46 × 10-6 Nm/rad.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 42

Given, area of coil,

A=20×10−3×15×10−3=3×10−4m2

Number of turns,

N=150 Flux density in air gap,

B=1.6×10−3Wb/m2

Spring constant,

K=0.46×10−6Nm/ rad

Current through the coil,

I=4mA=4×10−3A

Now, at equilibrium, the deflecting torque developed in the coil is equal to the restarting or controlling torque of the spring control. That is,

ταc⇒NBAI=Kθ Where θ is the angular deflection of the pointer.

Hence

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 43

An energy meter is connected to a load drawing 20 A, 220 V and 0.8 p.f. for 3 hours. The meter was observed making 2600 revolution during this period. The meter having meter constant 250 rev/KWhr. Find the error in the reading?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 43

Energy consumed by load =VIcos⁡ϕ×t×10−3KWhr

=220×20×0.8×3×10−3KWhr=10.56KWhr

The expected revolution for the measurement of true energy =10.56× meter constant

=10.56×250=2640rev

But meter makes the revolution =2600 rev.

So, the error =

= −1.51%

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 44

A single-phase transformer with secondary voltage of 230 V, 50 Hz, delivers power to a resistive load of 15 Ω through a half wave-controlled rectifier circuit. For a firing advance angle of 120°, then the form factor is _________.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 44 The answer is in between 1.8 and 2

The average value of output voltage is

firing angle = 180−120=60

RMS value of output voltage

Form factor =

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 45

Consider the network shown below with the following data.

Find the maximum power that can be transferred to the load. (in Watts)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 45

Let assume the Thevenin equivalent voltage across terminal AB is VThand Thevenin equivalent resistance is RTh.

So, the network N can be replaced by

Putting the value of RTh in the above equation, we get

VTh=10V

So, the maximum power that can be transferred to the load is

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 46

Consider a circuit shown below:

If the cut-in voltage of all the diodes equal to 0.7 V on their ON-state, then the value of current ‘I’ is equal to

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 46 V1=−0.7+0.7=0V

I=I0−I1=−0.86mA

I2=−0.7+55kΩ=0.86mA

I3=I2−I=0.86+0.86=1.72mA

I1>0A⇒D1 is forward Bias

I3>0A⇒D3 is forward Bias I>0A⇒D2 is forward Bias.

So, our assumption regarding D3 is wrong and it will be Reverse Bias.

As D2 is Reverse Bias, I=0 mA.

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 47

Two 3-phase alternator operates in parallel. The rating of one machine is 100 MW and that of other is 150 MW. Both alternator are fitted with governors having drooping characteristics of 5% and 6%. How will alternator share a common load of 180 MW.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 47 Let assume the original frequency is fo

Ist machine having droop = 5%

IInd machine having droop = 6%

According to similar triangle property.

Similarly.

P1 + P2 = 180

x = 0.04f0

P1 = 2000 × 0.04 = 80MW

P2 = 2500 × 0.04 = 100MW

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 48

A 3-phase salient pole alternator has direct axis reactance as 0.4 p.u. and quadrature axis reactance as 0.2 p.u. The excitation voltage is 1.3 p.u. and terminal voltage is held at 1 p.u. For the maximum power output, the rotor angle should be _______.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 48 For a salient pale alternator, the output power is

P=3.25sin⁡δ+1.25sin⁡2δ

Far maximum power output, =3.25cos⁡δ+2.5cos⁡2δ=0

2.5cos⁡28+3.25cos⁡δ=0

2.5[2cos2⁡δ−1]+3.25cos⁡δ=0

⇒5cos2⁡δ−2.5+3.25cos⁡δ=0

Let cos δ=x 5x2 + 3.25x - 2.5 = 0

x=0.453,−1.103( rejected )

cos⁡δ=0.453

δ=cos−1⁡[0.453]

δ = 63.06⁰

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 49

The input voltage from the inverter is controlled by single pulse modulation technique. The output voltage is free from fifth harmonics. If the supply voltage is 400 V DC, then the rms value of 7th harmonic component will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 49 The Fourier series of output voltage when single pulse modulation is used

since, output is free from 5th harmonic, then

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 50

An open circuit test is performed on transformer using variable frequency source and keeping V/f ratio constant. When it is tested on 50 Hz frequency, the core loss is found to be 615 W. When it is tested on 30 Hz, the core loss 300 W. Find the frequency at which core loss is 450 W.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 50 Open circuit test is performed by keeping the V/f ratio constant.

We know that,

Ph∝f i.e., hysteresis loss

Pe∝f2 i.e., eddy current loss

core loss, Pi=Ph+Pe

For 50Hz

By solving equation (1) and (2), we getA = 6.55&B = 0.115

Pi = 6.55f + 0.115f2

For core loss to be 450w.

450 = 6.55f + 0.119f2

0.115f2 + 6.55f − 450 = 0

So, the correct operating frequency is

f = 40.21Hz

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 51

A signal x[n]=Acos⁡(Bπn+C) is

I. Real and even

II. Period is 10

III. α1=5

IV. 0.1∑n=09|x[n]|2=50

The sum of A,B and C is


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 51 since the Fourier series coefficients repeat every N=10

Also, x[n] is real and even, ak is also real and even

Using Parseval's theorem,

Therefore, ak = 2Using Fourier transform,

Comparing with given equation,

A = 10, B = 0.2, 8C = 0

Therefore, A + B + C = 10 + 0.2 + 0 = 10.2

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 52

A3×3 Has an Eigen value - 1. The matrix A+ I reduced to corresponding to Eigen value -1 , all the Eigen vectors of A are non-zero Eigen vectors of the form

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 52

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 13 - Question 53

In a 3-bus system, if a symmetrical three phase fault occurs at bus 1, 2 or 3 fault currents are 20 pu, 25 pu and 40 pu respectively. Also if fault is at bus 1, voltage at bus 2 will be 0.8 pu , if fault is at bus 2, voltage at bus 3 will be 0.5 pu and if the fault is at bus 3, voltage at bus 1 will be 0.6 pu. Consider no load pre-fault conditions. What will be the sum of all the elements of ZBUS of the system in per unit?


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 53

Fault at bus

Similarity at Bus

At bus

Now, we know that, voltage at bus 'j' due to fault at bus 'k'

Voltage at 2 due to fault at 1 :

Voltage at 3 due to fault at 2 .

Voltage at 1 due to fault at 3 :

Sum of all elements of Zbus = 0.195

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 54

Let the inverse Laplace transform of F(s) is f(t), the function f(t) at t=6 will be, if

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 54

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 55

A 3300 V/230V, 50 Hz, 1-ϕ transformer has an equivalent resistance of 0.015 pu and an equivalent leakage reactance of 0.04 pu. The secondary terminal voltage at full load and 0.8 pf lagging far a primary voltage of 3300 V is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 55

Re = 0.015 pu

Xe = 0.04 pu

Vpu = 1 pu

I = 1.0∠–36.86° pu

V2’ = 1 – (1∠–36.86) × (0.015 + j0.04)

|V2’| = 0.964 pu

Secondary voltage on secondary side,

V2 = 230 × 0.964 = 221.72 V

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 56

The particular integral of

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 56

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 57

In the following circuit the z-parameters for L = 3 H are

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 57

For k=1/2, mutual inductance is

For k=3/2, mutual inductance is

Consider the circuit into s-domain as shown below

V1(s)=3sl1(s)+3sl1(s)+3sl1(s)−1.5sl1(s)−1.5sl1(s)+2sl2(s)

V1(s)=6s|1(s)+2s|2(s)……….(1)

V2(s)=3sl2(s)+2sl1(s)

V2(s)=2s|1(s)+3s|2(s)……….(2)

Comparing equation (1) and (2) with general equations, we get

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 58

For the circuit shown in figure below the value of RTh is ________Ω.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 58 Writing currents into 100 Ω and 300 Ω resistors by sing KCL as shown in figure.

Ix = 1A, Vx = Vtest

Writing mesh equation for bottom right mesh

Vtest = 100(1 – 2Ix) + 300(1 – 2Ix – 0.01Vx) + 800

= 100 V

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 59

For the circuit shown below resonant frequency f0 is ____ kHz

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 59 To obtain input impedance, we put a test source across input terminals as shown in figure.

Writing loop equation for the left loop

For resonance

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 60

A vector field to represent a magnetic field at (1,2,3) the value of R should be,

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 60 For magnetic field divergence should be 0

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 61

The step response of a system is s(t)=12(1−e−2t)u(t), then find the output of the system when, input 2Δ(t−3) is applied.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 61 Given that step response

We know that, impulse response,

Now: For the above system input 2Δ(t−3) is applied.

Output y(t)=e−2tu(t) and 2Δ(t−3)

y(t) = e-2(t-3)u(t-3)

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 62

The h-parameters for the two-port network shown in figure is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 62

For the ideal transformer

Writing K.VL in primary and secondary loops

Substituting VA=VB/2 into equation (1)

From equation (2), put (∨B=V2−4l2)

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 63

A 4-pole 50Hz synchronous generator has 48 slots in which a double layer winding is housed. Each coil has 10 turns and is short pitched by an angle of 360 electrical. The fundamental flux per pole is 0.025 WB. Find the per phase induced emf (in volts) for a 3-phase star connection is approximately

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 63 For double layer no of coils =no of slots=48

Total no of turns 48×10=480

For 3−∅ winding turns per phase =480/3=160

Kp=cos⁡(α/2)=cos⁡(36/2)=0.951

β=180/ slots per pole =180/48/4=150

m= slots / (poles × phasE. =48/(43)=4

Eph=4.44×Kp×Kd×∅×f×Nph

Eph=4.44×0.951×0.9576×0.025×50×160

Eph=808.68

Eph = 1400.67V

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 64

Consider the RLC network shown in the figure below:

The quality factor (Q) of the above network is given by

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 64 For a parallel RLC circuit quality factor is given by

Gate Mock Test: Electrical Engineering(EE)- 13 - Question 65

In a 3-ϕ Induction motor, the rotor standstill resistance is equal to one fourth of its reactance. The full torque of the motor is 309 N-m which is developed at a slip of 4 %. Find the starting torque (in N-m)?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 13 - Question 65

Given that

The slip at starting will be equal to 1. So,

Tst = 0.470 × Tmax = 0.470 × 990.38 = 465.48N − m

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