Test: Direct Memory Access


15 Questions MCQ Test Computer Architecture & Organisation (CAO) | Test: Direct Memory Access


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This mock test of Test: Direct Memory Access for Computer Science Engineering (CSE) helps you for every Computer Science Engineering (CSE) entrance exam. This contains 15 Multiple Choice Questions for Computer Science Engineering (CSE) Test: Direct Memory Access (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Direct Memory Access quiz give you a good mix of easy questions and tough questions. Computer Science Engineering (CSE) students definitely take this Test: Direct Memory Access exercise for a better result in the exam. You can find other Test: Direct Memory Access extra questions, long questions & short questions for Computer Science Engineering (CSE) on EduRev as well by searching above.
QUESTION: 1

The DMA differs from the interrupt mode by

Solution:

Answer: d
Explanation: DMA is an approcah of performing data transfers in bulk between memory and the external device without the intervention of the processor.

QUESTION: 2

The DMA transfers are performed by a control circuit called as

Solution:

Answer: b
Explanation: The Controller performs the functions that would normally be carried out by the processor.

QUESTION: 3

 In DMA transfers, the required signals and addresses are given by the

Solution:

Answer: c
Explanation: The DMA controller acts like a processor for DMA transfers and overlooks the entire process.

QUESTION: 4

 After the complition of the DMA transfer the processor is notified by

Solution:

Answer: b
Explanation: The controller raises an interrupt signal to notify the processor that the transfer was complete.

QUESTION: 5

The DMA controller has _______ registers

Solution:

Answer: c
Explanation: The Controller uses the registers to store the starting address,word count and the status of the operation.

QUESTION: 6

When the R/W bit of the status register of the DMA controller is set to 1.

Solution:
QUESTION: 7

The controller is connected to the ____

Solution:

Answer: b
Explanation: The controller is directly connected to the system BUS to provide faster transfer of data.

QUESTION: 8

Can a single DMA controller perform operations on two different disks simulteneously? 

Solution:

Answer: a
Explanation: The DMA controller can perform operations on two different disks if the appropriate details are known.

QUESTION: 9

The techinique whereby the DMA controller steals the access cycles of the processor to operate is called

Solution:

Answer: c
Explanation: The controller takes over the processor’s access cycles and performs memory operations.

QUESTION: 10

The technique where the controller is given complete access to main memory is

Solution:

Answer: d
Explanation: The controller is given full control of the memory access cycles and can transfer blocks at a faster rate.

QUESTION: 11

The controller uses _____ to help with the transfers when handling network interfaces.

Solution:

Answer: a
Explanation: The controller stores the data to transfered in the buffer and then transfers it.

QUESTION: 12

To overcome the conflict over the possession of the BUS we use ______

Solution:

Answer: b
Explanation: The BUS arbitrator is used overcome the contention over the BUS possession.

QUESTION: 13

The registers of the controller are ______

Solution:
QUESTION: 14

When process requests for a DMA transfer

Solution:

Answer: d
Explanation: The process requesting the transfer is paused and the operation is performed , meanwhile another process is run on the processor.

QUESTION: 15

The DMA transfer is initiated by _____

Solution:

Answer: c
Explanation: The transfer can only be initiated by instruction of a program being executed.

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