Semiconductor Electronics- 2 Practice Questions - DPP for NEET

 Page 1


DIRECTIONS (Q.1-Q.20) : There are 20 multiple choice
questions. Each] question has 4 choices (a), (b), (c) and (d),
out of which ONLY ONE choice is correct.
Q.1 A 
NPN
 transistor conducts when
(a) both collector and emitter are positive with respect
to the base
(b) collector is positive and emitter is negative with
respect to the base
(c) collector is positive and emitter is at same potential
as the base
(d) both collector and emitter are negative with respect
to the base
Q.2 In the case of constants a and b of a transistor
(a) a = b (b) b < 1, a > 1
(c) a = b
2
(d) b > 1, a < 1
Q.3 In an NPN transistor 10
10
 electrons enter the emitter in
10
–6
 s and 2% electrons recombine with holes in base,
then a and b respectively are
(a) a = 0.98, b = 49 (b) a = 49, b = 0.98
(c) a = 0.49, b = 98 (d) a = 98, b = 0.49
Q.4 If 
1 23
,, l ll are the lengths of the emitter, base and collector
of a transistor then
(a)l
1
 = l
2
 = l
3
(b)l
3
 < l
2
 > l
1
(c)l
3
 < l
1
 < l
2
(d)l
3
 > l
1
 > l
2
Q.5 In an NPN transistor circuit, the collector current is 10
mA. If 90% of the electrons emitted reach the collector,
the emitter current (i
E
) and base current  (i
B
) are given by
(a) 1mA, 9mA
EB
ii =-= (b) 9mA, 1mA
EB
ii = =-
(c) 1mA, 11mA
EB
ii == (d) 11mA, 1mA
EB
ii ==
Page 2


DIRECTIONS (Q.1-Q.20) : There are 20 multiple choice
questions. Each] question has 4 choices (a), (b), (c) and (d),
out of which ONLY ONE choice is correct.
Q.1 A 
NPN
 transistor conducts when
(a) both collector and emitter are positive with respect
to the base
(b) collector is positive and emitter is negative with
respect to the base
(c) collector is positive and emitter is at same potential
as the base
(d) both collector and emitter are negative with respect
to the base
Q.2 In the case of constants a and b of a transistor
(a) a = b (b) b < 1, a > 1
(c) a = b
2
(d) b > 1, a < 1
Q.3 In an NPN transistor 10
10
 electrons enter the emitter in
10
–6
 s and 2% electrons recombine with holes in base,
then a and b respectively are
(a) a = 0.98, b = 49 (b) a = 49, b = 0.98
(c) a = 0.49, b = 98 (d) a = 98, b = 0.49
Q.4 If 
1 23
,, l ll are the lengths of the emitter, base and collector
of a transistor then
(a)l
1
 = l
2
 = l
3
(b)l
3
 < l
2
 > l
1
(c)l
3
 < l
1
 < l
2
(d)l
3
 > l
1
 > l
2
Q.5 In an NPN transistor circuit, the collector current is 10
mA. If 90% of the electrons emitted reach the collector,
the emitter current (i
E
) and base current  (i
B
) are given by
(a) 1mA, 9mA
EB
ii =-= (b) 9mA, 1mA
EB
ii = =-
(c) 1mA, 11mA
EB
ii == (d) 11mA, 1mA
EB
ii ==
2
DPP/ P 58
Q.6 The transfer ratio of a transistor is 50. The input resistance
of the transistor when used in the common-emitter
configuration is 1 kW. The peak value for an A.C input
voltage of 0.01 V peak is
(a) 100µA (b) 0.01 mA
(c) 0.25 mA (d) 500µA
Q.7 For transistor, the current amplification factor is 0.8. The
transistor is connected in common emitter configuration.
The change in the collector current when the base current
changes by 6 mA is
(a) 6 mA (b) 4.8 mA
(c) 24 mA (d) 8 mA
Q.8 In 
NPN
transistor the collector current is 10 mA. If 90%
of electrons emitted reach the collector, then
(a) emitter current will be 9 mA
(b) emitter current will be 11.1 mA
(c) base current will be 0.1 mA
(d) base current will be 0.01 mA
Q.9 In a transistor in CE configuration, the ratio of power gain
to voltage gain is
(a) a (b) b / a
(c) ba (d) b
Q.10 The following truth table corresponds to the logic gate
                  
0 0 11
0 1 01
0 1 11
A
B
X
(a) NAND (b) OR
(c) AND (d) XOR
Q.11 The truth table shown in figure is for
0 0 11
0 1 01
1 0 01
A
B
Y
(a) XOR (b) AND
(c) XNOR (d) OR
Q.12 For the given combination of gates, if the logic states of
inputs ,, ABCare as follows
0 ABC = ==
 and
1 AB ==
,
 
0 C =
then the logic states of output D are
(a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
Q.13 Correct statement for ‘NOR’ gate is that, it gives
(a) high output when both the inputs are low
(b) low output when both the inputs are low
(c) high output when both the inputs are high
(d) None of these
Q.14 A gate has the following truth table
11 00
10 10
1 000
P
Q
R
The gate is
(a) NOR (b) OR (c) NAND (d) AND
Q.15What will be the input of A and B for the Boolean
expression ( ).( . )1 += A B AB
(a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
Q.16 To get an output 1 from the circuit shown in the figure, the
input can be
(a) 0, 1,0 A BC = == (b) 1, 0,0 A BC = ==
(c) 1, 0,1 A BC = == (d) 1, 1, 0 ABC = ==
Q.17 The truth-table given below is for which gate?
0 0 11
0 1 01
1 1 10
A
B
C
(a) XOR (b) OR (c) AND (d) NAND
Page 3


DIRECTIONS (Q.1-Q.20) : There are 20 multiple choice
questions. Each] question has 4 choices (a), (b), (c) and (d),
out of which ONLY ONE choice is correct.
Q.1 A 
NPN
 transistor conducts when
(a) both collector and emitter are positive with respect
to the base
(b) collector is positive and emitter is negative with
respect to the base
(c) collector is positive and emitter is at same potential
as the base
(d) both collector and emitter are negative with respect
to the base
Q.2 In the case of constants a and b of a transistor
(a) a = b (b) b < 1, a > 1
(c) a = b
2
(d) b > 1, a < 1
Q.3 In an NPN transistor 10
10
 electrons enter the emitter in
10
–6
 s and 2% electrons recombine with holes in base,
then a and b respectively are
(a) a = 0.98, b = 49 (b) a = 49, b = 0.98
(c) a = 0.49, b = 98 (d) a = 98, b = 0.49
Q.4 If 
1 23
,, l ll are the lengths of the emitter, base and collector
of a transistor then
(a)l
1
 = l
2
 = l
3
(b)l
3
 < l
2
 > l
1
(c)l
3
 < l
1
 < l
2
(d)l
3
 > l
1
 > l
2
Q.5 In an NPN transistor circuit, the collector current is 10
mA. If 90% of the electrons emitted reach the collector,
the emitter current (i
E
) and base current  (i
B
) are given by
(a) 1mA, 9mA
EB
ii =-= (b) 9mA, 1mA
EB
ii = =-
(c) 1mA, 11mA
EB
ii == (d) 11mA, 1mA
EB
ii ==
2
DPP/ P 58
Q.6 The transfer ratio of a transistor is 50. The input resistance
of the transistor when used in the common-emitter
configuration is 1 kW. The peak value for an A.C input
voltage of 0.01 V peak is
(a) 100µA (b) 0.01 mA
(c) 0.25 mA (d) 500µA
Q.7 For transistor, the current amplification factor is 0.8. The
transistor is connected in common emitter configuration.
The change in the collector current when the base current
changes by 6 mA is
(a) 6 mA (b) 4.8 mA
(c) 24 mA (d) 8 mA
Q.8 In 
NPN
transistor the collector current is 10 mA. If 90%
of electrons emitted reach the collector, then
(a) emitter current will be 9 mA
(b) emitter current will be 11.1 mA
(c) base current will be 0.1 mA
(d) base current will be 0.01 mA
Q.9 In a transistor in CE configuration, the ratio of power gain
to voltage gain is
(a) a (b) b / a
(c) ba (d) b
Q.10 The following truth table corresponds to the logic gate
                  
0 0 11
0 1 01
0 1 11
A
B
X
(a) NAND (b) OR
(c) AND (d) XOR
Q.11 The truth table shown in figure is for
0 0 11
0 1 01
1 0 01
A
B
Y
(a) XOR (b) AND
(c) XNOR (d) OR
Q.12 For the given combination of gates, if the logic states of
inputs ,, ABCare as follows
0 ABC = ==
 and
1 AB ==
,
 
0 C =
then the logic states of output D are
(a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
Q.13 Correct statement for ‘NOR’ gate is that, it gives
(a) high output when both the inputs are low
(b) low output when both the inputs are low
(c) high output when both the inputs are high
(d) None of these
Q.14 A gate has the following truth table
11 00
10 10
1 000
P
Q
R
The gate is
(a) NOR (b) OR (c) NAND (d) AND
Q.15What will be the input of A and B for the Boolean
expression ( ).( . )1 += A B AB
(a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
Q.16 To get an output 1 from the circuit shown in the figure, the
input can be
(a) 0, 1,0 A BC = == (b) 1, 0,0 A BC = ==
(c) 1, 0,1 A BC = == (d) 1, 1, 0 ABC = ==
Q.17 The truth-table given below is for which gate?
0 0 11
0 1 01
1 1 10
A
B
C
(a) XOR (b) OR (c) AND (d) NAND
DPP/ P
3
58
Q.18 The combination of gates shown below produces
(a) AND gate (b) XOR gate
(c) NOR gate (d) NAND gate
Q.19Figure gives a system of logic gates. From the study of
truth table it can be found that to produce a high output (1)
at R, we must have
(a) X = 0, Y = 1 (b) X = 1, Y = 1
(c) X = 1, Y = 0 (d) X = 0, Y = 0
Q.20 In the case of a common emitter transistor as/an amplifier,
the ratio I
c 
/I
e
 is 0.96, then the current gain (b) of the amplifier
is
(a)6 (b) 48
(c) 24 (d) 12
DIRECTIONS (Q.21-Q.23) : In the following questions,
more than one of the answers  given are correct. Select the
correct answers and mark it according to the following
codes:
Codes :
(a) 1, 2 and 3 are correct (b) 1 and 2 are correct
(c) 2 and 4 are correct (d) 1 and 3 are correct
Q.21Which of the following are false?
(1) Common base transistor is commonly used because
current gain is maximum
(2) Common collector is commonly used because current
gain is maximum
(3) Common emitter is the least used transistor
(4) Common emitter is commonly used because current
gain is maximum
Q.22 Given below are symbols for some logic gates. The XOR
gate and NOR gate are respectively
(1) (2) 
(3) (4)
Q.23Given below are four logic gates symbol (figure). Those
for OR, NOR and NAND are respectively
(1)
A
B
y
(2)
B
A y
(3)
y
B
A
(4)
B
A y
DIRECTIONS (Q.24-Q.25) : Read the passage given below
and answer the questions that follows :
Doping changes the fermi energy of a semiconductor. Consider
silicon, with a gap of 1.11 eV between the top of the valence
bond and the bottom of the conduction band. At 300K the Fermi
level of the pure material is nearly at the mid-point of the gap.
Suppose that silicon is doped with donor atoms, each of which
has a state 0.15 eV below the bottom of the silicon conduction
band, and suppose further that doping raises the Fermi level to
0.11 eV below the bottom of that band.
Conduction Band
Valence Band
Fermi
level
Donor 
level
1.11eV
Q.24 For both pure and doped silicon, calculate the probability
that a state at the bottom of the silicon conduction band is
occupied? (e
4.524
 = 70.38)
(a) 5.20 × 10
–2
(b) 1.40 × 10
–2
(c) 10.5 × 10
–2
(d) 14 × 10
–2
Q.25Calculate the probability that a donor state in the doped
material is occupied? e
–1.547
 = 0.212
(a) 0.824 (b) 0.08
(c) 0.008 (d) 8.2
Page 4


DIRECTIONS (Q.1-Q.20) : There are 20 multiple choice
questions. Each] question has 4 choices (a), (b), (c) and (d),
out of which ONLY ONE choice is correct.
Q.1 A 
NPN
 transistor conducts when
(a) both collector and emitter are positive with respect
to the base
(b) collector is positive and emitter is negative with
respect to the base
(c) collector is positive and emitter is at same potential
as the base
(d) both collector and emitter are negative with respect
to the base
Q.2 In the case of constants a and b of a transistor
(a) a = b (b) b < 1, a > 1
(c) a = b
2
(d) b > 1, a < 1
Q.3 In an NPN transistor 10
10
 electrons enter the emitter in
10
–6
 s and 2% electrons recombine with holes in base,
then a and b respectively are
(a) a = 0.98, b = 49 (b) a = 49, b = 0.98
(c) a = 0.49, b = 98 (d) a = 98, b = 0.49
Q.4 If 
1 23
,, l ll are the lengths of the emitter, base and collector
of a transistor then
(a)l
1
 = l
2
 = l
3
(b)l
3
 < l
2
 > l
1
(c)l
3
 < l
1
 < l
2
(d)l
3
 > l
1
 > l
2
Q.5 In an NPN transistor circuit, the collector current is 10
mA. If 90% of the electrons emitted reach the collector,
the emitter current (i
E
) and base current  (i
B
) are given by
(a) 1mA, 9mA
EB
ii =-= (b) 9mA, 1mA
EB
ii = =-
(c) 1mA, 11mA
EB
ii == (d) 11mA, 1mA
EB
ii ==
2
DPP/ P 58
Q.6 The transfer ratio of a transistor is 50. The input resistance
of the transistor when used in the common-emitter
configuration is 1 kW. The peak value for an A.C input
voltage of 0.01 V peak is
(a) 100µA (b) 0.01 mA
(c) 0.25 mA (d) 500µA
Q.7 For transistor, the current amplification factor is 0.8. The
transistor is connected in common emitter configuration.
The change in the collector current when the base current
changes by 6 mA is
(a) 6 mA (b) 4.8 mA
(c) 24 mA (d) 8 mA
Q.8 In 
NPN
transistor the collector current is 10 mA. If 90%
of electrons emitted reach the collector, then
(a) emitter current will be 9 mA
(b) emitter current will be 11.1 mA
(c) base current will be 0.1 mA
(d) base current will be 0.01 mA
Q.9 In a transistor in CE configuration, the ratio of power gain
to voltage gain is
(a) a (b) b / a
(c) ba (d) b
Q.10 The following truth table corresponds to the logic gate
                  
0 0 11
0 1 01
0 1 11
A
B
X
(a) NAND (b) OR
(c) AND (d) XOR
Q.11 The truth table shown in figure is for
0 0 11
0 1 01
1 0 01
A
B
Y
(a) XOR (b) AND
(c) XNOR (d) OR
Q.12 For the given combination of gates, if the logic states of
inputs ,, ABCare as follows
0 ABC = ==
 and
1 AB ==
,
 
0 C =
then the logic states of output D are
(a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
Q.13 Correct statement for ‘NOR’ gate is that, it gives
(a) high output when both the inputs are low
(b) low output when both the inputs are low
(c) high output when both the inputs are high
(d) None of these
Q.14 A gate has the following truth table
11 00
10 10
1 000
P
Q
R
The gate is
(a) NOR (b) OR (c) NAND (d) AND
Q.15What will be the input of A and B for the Boolean
expression ( ).( . )1 += A B AB
(a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
Q.16 To get an output 1 from the circuit shown in the figure, the
input can be
(a) 0, 1,0 A BC = == (b) 1, 0,0 A BC = ==
(c) 1, 0,1 A BC = == (d) 1, 1, 0 ABC = ==
Q.17 The truth-table given below is for which gate?
0 0 11
0 1 01
1 1 10
A
B
C
(a) XOR (b) OR (c) AND (d) NAND
DPP/ P
3
58
Q.18 The combination of gates shown below produces
(a) AND gate (b) XOR gate
(c) NOR gate (d) NAND gate
Q.19Figure gives a system of logic gates. From the study of
truth table it can be found that to produce a high output (1)
at R, we must have
(a) X = 0, Y = 1 (b) X = 1, Y = 1
(c) X = 1, Y = 0 (d) X = 0, Y = 0
Q.20 In the case of a common emitter transistor as/an amplifier,
the ratio I
c 
/I
e
 is 0.96, then the current gain (b) of the amplifier
is
(a)6 (b) 48
(c) 24 (d) 12
DIRECTIONS (Q.21-Q.23) : In the following questions,
more than one of the answers  given are correct. Select the
correct answers and mark it according to the following
codes:
Codes :
(a) 1, 2 and 3 are correct (b) 1 and 2 are correct
(c) 2 and 4 are correct (d) 1 and 3 are correct
Q.21Which of the following are false?
(1) Common base transistor is commonly used because
current gain is maximum
(2) Common collector is commonly used because current
gain is maximum
(3) Common emitter is the least used transistor
(4) Common emitter is commonly used because current
gain is maximum
Q.22 Given below are symbols for some logic gates. The XOR
gate and NOR gate are respectively
(1) (2) 
(3) (4)
Q.23Given below are four logic gates symbol (figure). Those
for OR, NOR and NAND are respectively
(1)
A
B
y
(2)
B
A y
(3)
y
B
A
(4)
B
A y
DIRECTIONS (Q.24-Q.25) : Read the passage given below
and answer the questions that follows :
Doping changes the fermi energy of a semiconductor. Consider
silicon, with a gap of 1.11 eV between the top of the valence
bond and the bottom of the conduction band. At 300K the Fermi
level of the pure material is nearly at the mid-point of the gap.
Suppose that silicon is doped with donor atoms, each of which
has a state 0.15 eV below the bottom of the silicon conduction
band, and suppose further that doping raises the Fermi level to
0.11 eV below the bottom of that band.
Conduction Band
Valence Band
Fermi
level
Donor 
level
1.11eV
Q.24 For both pure and doped silicon, calculate the probability
that a state at the bottom of the silicon conduction band is
occupied? (e
4.524
 = 70.38)
(a) 5.20 × 10
–2
(b) 1.40 × 10
–2
(c) 10.5 × 10
–2
(d) 14 × 10
–2
Q.25Calculate the probability that a donor state in the doped
material is occupied? e
–1.547
 = 0.212
(a) 0.824 (b) 0.08
(c) 0.008 (d) 8.2
4
DPP/ P 58
DIRECTIONS (Q. 26-Q.28) : Each of these questions contains
two statements: Statement-1 (Assertion) and Statement-2
(Reason). Each of these questions has four alternative choices,
only one of which is the correct answer. You have to select the
correct choice.
(a) Statement-1 is True, Statement-2 is True; Statement-2 is a
correct explanation for  Statement-1.
(b) Statement-1 is True, Statement-2 is True; Statement-2 is
NOT a correct explanation for Statement-1.
(c) Statement -1 is False, Statement-2 is True.
(d) Statement -1 is True, Statement-2 is False.
Q.26 Statement -1 : The logic gate NOT cannot be built by using
diode.
Statement -2 : The output voltage and the input voltage of
the diode have 180° phase difference.
Q.27 Statement -1 : The following circuit represents ‘OR’ gate
Statement-2 : For the above circuit Y X AB AB = = +=+
Q.28 Statement -1 : De-morgan’s theorem 
. A B AB +=
 may be
explained by the following circuit
Statement -2 : In the following circuit, for output 1 inputs
A,B,C are 1, 0, 1.