Formula Sheets: Logic Gate & Boolean Algebra | Digital Electronics - Electrical Engineering (EE) PDF Download

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Digital Electronics: Logic Gates & Bo olean Algebra
F orm ula Sheet for Electrical GA TE
Logic Gates
• AND Gate : Y =A·B
• OR Gate : Y =A+B
• NOT Gate : Y =A
• NAND Gate : Y =A·B
• NOR Gate : Y =A+B
• X OR Gate : Y =A?B =AB +AB
• XNOR Gate : Y =A?B =AB +AB
Bo olean Algebra Theorems
• Iden tit y La ws :
A+0 =A, A·1 =A
• Null La ws :
A+1 = 1, A·0 = 0
• Idemp oten t La ws :
A+A =A, A·A =A
• Complemen t La ws :
A+A = 1, A·A = 0
• Comm utativ e La ws :
A+B =B +A, A·B =B ·A
• Asso ciativ e La ws :
(A+B)+C =A+(B +C), (A·B)·C =A·(B ·C)
• Distributiv e La ws :
A·(B +C) =A·B +A·C, A+(B ·C) = (A+B)·(A+C)
• Absorption La ws :
A+A·B =A, A·(A+B) =A
• De Morgan’s Theorems :
A+B =A·B, A·B =A+B
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Digital Electronics: Logic Gates & Bo olean Algebra
F orm ula Sheet for Electrical GA TE
Logic Gates
• AND Gate : Y =A·B
• OR Gate : Y =A+B
• NOT Gate : Y =A
• NAND Gate : Y =A·B
• NOR Gate : Y =A+B
• X OR Gate : Y =A?B =AB +AB
• XNOR Gate : Y =A?B =AB +AB
Bo olean Algebra Theorems
• Iden tit y La ws :
A+0 =A, A·1 =A
• Null La ws :
A+1 = 1, A·0 = 0
• Idemp oten t La ws :
A+A =A, A·A =A
• Complemen t La ws :
A+A = 1, A·A = 0
• Comm utativ e La ws :
A+B =B +A, A·B =B ·A
• Asso ciativ e La ws :
(A+B)+C =A+(B +C), (A·B)·C =A·(B ·C)
• Distributiv e La ws :
A·(B +C) =A·B +A·C, A+(B ·C) = (A+B)·(A+C)
• Absorption La ws :
A+A·B =A, A·(A+B) =A
• De Morgan’s Theorems :
A+B =A·B, A·B =A+B
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Standard F orms
• Sum of Pro ducts (SOP) :
Y =
?
m
i
=ABC +ABC +...
where m
i
are min terms.
• Pro duct of Sums (POS) :
Y =
?
M
i
= (A+B +C)·(A+B +C)·...
where M
i
are maxterms.
• Min term (n v ariables) :
m
i
= Pro duct of n v ariables (0 for complemen ted, 1 for uncomplemen ted)
• Maxterm (n v ariables) :
M
i
= Sum of n v ariables (1 for complemen ted, 0 for uncomplemen ted)
Simplification T ec hniques
• Karnaugh Map (K-Map) :
Group 2
n
adjacen t 1s to minimize terms (e.g., pair s, quads, o ctets)
• Don’t Care Conditions : Use to optimize grouping in K-Map.
• Consensus Theorem :
AB +AC +BC =AB +AC
Gate Equiv alences
• NAND as Univ ersal Gate :
NOT :A =A·A, AND :A·B =A·B, OR :A+B =A·B
• NOR as Univ ersal Gate :
NOT :A =A+A, OR :A+B =A+B, AND :A·B =A+B
Key Notes
– Logic Lev els : 0 (Lo w), 1 (High).
– K-Map R ules : Group sizes m ust b e p o w ers of 2; co v er all 1s with minimal groups.
– De Morgan’s Application : Con v ert SOP to POS and vice v ersa.
– GA TE F o cus : Simplify expressions using Bo olean theorems and K-Maps; con v ert
to NAND/NOR implemen tations.
– Min term/Maxterm : Min term index is binary to decimal; maxterm is comple-
men t.
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