Array Processing Computer Science Engineering (CSE) Notes | EduRev

Computer Architecture & Organisation (CAO)

Electronics and Communication Engineering (ECE) : Array Processing Computer Science Engineering (CSE) Notes | EduRev

The document Array Processing Computer Science Engineering (CSE) Notes | EduRev is a part of the Electronics and Communication Engineering (ECE) Course Computer Architecture & Organisation (CAO).
All you need of Electronics and Communication Engineering (ECE) at this link: Electronics and Communication Engineering (ECE)

Array Processing

  • An array processor is a processor that performs computations on large arrays of data.
  • The term is used to refer to two different types of processors.
    • Attached array processor:
      • Is an auxiliary processor.
      • It is intended to improve the performance of the host computer in specific numerical computation tasks.
    • SIMD array processor:
      • Has a single-instruction multiple-data organization.
      • It manipulates vector instructions by means of multiple functional units responding to a common instruction.

Attached Array Processor

  • Its purpose is to enhance the performance of the computer by providing vector processing for complex scientific applications.
    • Parallel processing with multiple functional units
  • Fig. 4-14 shows the interconnection of an attached array processor to a host computer.
  • For example, when attached to a VAX 11 computer, the FSP-164/MAX from Floating-Point Systems increases the computing power of the VAX to 100megaflops.
  • The objective of the attached array processor is to provide vector manipulation capabilities to a conventional computer at a fraction of the cost of supercomputer. 

Array Processing Computer Science Engineering (CSE) Notes | EduRev

SIMD Array Processor

  • An SIMD array processor is a computer with multiple processing units operating in parallel.
  • A general block diagram of an array processor is shown in Fig. 9-15.
    • It contains a set of identical processing elements (PEs), each having a local memory M.
    • Each PE includes an ALU, a floating-point arithmetic unit, and working registers.
    • Vector instructions are broadcast to all PEs simultaneously.
  • Masking schemes are used to control the status of each PE during the execution of vector instructions.
    • Each PE has a flag that is set when the PE is active and reset when the PE is inactive.
  • For example, the ILLIAC IV computer developed at the University of Illinois and manufactured by the Burroughs Corp.
    • Are highly specialized computers.
    • They are suited primarily for numerical problems that can be expressed in vector or matrix form.

Array Processing Computer Science Engineering (CSE) Notes | EduRev

Offer running on EduRev: Apply code STAYHOME200 to get INR 200 off on our premium plan EduRev Infinity!

Related Searches

Semester Notes

,

Objective type Questions

,

pdf

,

Sample Paper

,

Array Processing Computer Science Engineering (CSE) Notes | EduRev

,

past year papers

,

shortcuts and tricks

,

Array Processing Computer Science Engineering (CSE) Notes | EduRev

,

Important questions

,

mock tests for examination

,

ppt

,

Exam

,

Viva Questions

,

Free

,

Array Processing Computer Science Engineering (CSE) Notes | EduRev

,

video lectures

,

Extra Questions

,

Previous Year Questions with Solutions

,

Summary

,

MCQs

,

study material

,

practice quizzes

;