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Cache Mapping & Direct Mapping Video Lecture | Embedded Systems (Web) - Computer Science Engineering (CSE)
FAQs on Cache Mapping & Direct Mapping Video Lecture - Embedded Systems (Web) - Computer Science Engineering (CSE)
| 1. What is cache mapping? |  |
Ans. Cache mapping is a technique used in computer architecture to determine how data is stored and retrieved in a cache memory. It defines the mapping of main memory blocks to cache memory locations.
| 2. What is direct mapping in cache memory? | |
Ans. Direct mapping is a cache mapping technique where each block of main memory is mapped to a specific cache location. Each block can only be placed in a specific cache location determined by the block's address modulo the number of cache slots.
| 3. How does direct mapping work in cache memory? | |
Ans. In direct mapping, each memory block has a specific slot in the cache where it can be stored. The cache memory is divided into sets, with each set containing one cache slot. The mapping is determined by the block's address modulo the number of cache slots. When a memory block is accessed, it is first checked if it is present in its corresponding cache slot based on the mapping.
| 4. What are the advantages of direct mapping in cache memory? | |
Ans. Direct mapping has certain advantages in cache memory design. Firstly, it is simple to implement and requires minimal hardware complexity. Secondly, it allows for fast access to the cache memory as the mapping is deterministic. Lastly, it reduces the chances of cache conflicts as each memory block has a fixed cache location.
| 5. What are the limitations of direct mapping in cache memory? | |
Ans. Direct mapping has some limitations. One major limitation is the potential for cache conflicts, where multiple memory blocks map to the same cache slot. This can result in cache misses and slower access times. Additionally, direct mapping may not effectively utilize the available cache space as some cache slots may remain unused while others are fully occupied.
Text Transcript from Video
the main point of concern in this
particular video session is the cache
memory mapping cache memory mapping
means how the main memory data will get
mapped onto the cache memory and it is
not moved it is copy that means the data
will remain in the main memory and also
it's replicas will get dumped onto the
cache memory so how these things can be
done and what are the different logic or
what are the different way to do it can
be categorized into three different
categories so cache mapping can be
updated so one use your direct mapping
we are going to discuss this one right
now in the next video I shall go for
associative mapping and last one I shall
go for the fake absolute mapping
so direct mapping associative mapping
and set associative mapping let us
concern it on the direct mapping in this
particular case now the thing is that
for all the mapping I shall take the
same example so that you can feel that
in this in different mapping how the
situation's are getting graded so now
let us suppose I am considering that the
main memory is having 4 0 9 6 number of
pages or is the page the main memory
full main memory will be divided into
equal sized fragments equal size petals
all those fragments are having the equal
size then such so if we go on dividing
this main memory then I shall get 4 0 96
number of I shall get 4 0 9 6 number of
pages as I'm studying from 0 so the last
page number has become 4 0 9 5 but if
you go for the count it is 4 0 9 6
number of pages are there so each and
every page has got fatter number of
locations so here this location numbers
are considered at 16 locations per page
okay so that means how much memory were
having how much memory were having
whether it is 4 0 9 6 number of pages
each page is having 16 locations so what
is this this is to the power of 2 Mills
for and to deliver up 10 mins 1 0 to 6
this is all multiplying you are getting
4 0 9 takes in 2 to the power of 4 for
16 so we are getting to the product 16
so actually we are having this 16 bit
address so this memory is having 16 bit
address
so now if you consider this one we're
having 16 bit address out of them 12
bits will be denoting the page number
and 12 bits can have combinations to
this product 12 that is 4 0 9 6 that is
page number 0 to 4 0 9 5 and here we are
having 4 bit offset and it will be
denoting the page offset so that
fifteen locations markets who have taken
you might be asking me why this while
not a single buys or single locations
data is getting that while page wise
because you know that each and every
program has got locality of reference
what is locality of reference locality
of reference is that the instruction
which is executing now and the next
instruction which is going to get
executed probabilities hires that it
will be in the vicinity of the previous
instruction which is in execution right
now that is the next instruction which
is supposed to be executed will be near
going to the current instruction which
is getting executed right now this is
known as locality of reference right now
I'm talking about cache memory I think
next 10 to 12 statements whatever I
shall I shall make will be Han cache
memory also so in my speech that is
locality of reference so that is the
locality of reference so I'm guessing
that if I load ten locations content at
a time to the cache memory from the main
memory then for the some sigit of time
the program control will remain confined
within that page and each and every page
is of stem side and in the cache memory
now let me come to the cache memory I've
divided this total cache memory into one
zero two sorry
into 128 number of theories where each
and every frame size each and every
spring size is equal to the paper edge
because when one page will be going it
will be it will fit onto a single frame
so paste ID is equal to frame size that
is always universally true okay so how
many prints are you having in the cache
memory 128 a number of things if you
start from the frame number 0 what will
be the maximum frame number of this
plate is 127 so 1 2 index number of
frames are there so if we consider in
case of cache memory in case of cache
memory so to dilute the frame number I
request
Seventeen's because the members can have
your 128 combination and as I told you
that s size is equal to the frame size
so will be having four bits for the page
the page offset or the displacement so
cache memory at this bits will be
elephant and many memories that this
means will be 16 according to my example
it is not hard infers that always it
will be doing like this I am taking one
example so that I can go for the mapping
accordingly so that is the way it is
being done good next so C is equal to
128 here C is equal to capital C of
written so there is the cache memory
wave number and here is a capital P that
is the main memory space number is 4 0 9
3 now let me go for the direct method so
in this in this training while
discussing this direct might be okay in
terms of Ganic mapping what will happen
how many how many prints are there in
the cache memory how many prints 128
number of pairs so I shall mix 128 then
128 then 128 and so on in this way I am
dividing this main memory into 32 number
of blocks
why because you see if 4 0 96 is getting
divided by 128 because 128 pages in a
single block in this we are having 4 0
96 what is this it is to the point of it
is 2 to the power of 12 for John 9
stations to product well and this is
nothing but 2 to the power of 7 so when
the bases are equal then exponents will
be subtracted in case of division so to
the power of 5 and that is article that
means 0 to 31
they do not work now please remember
what is the name of this mapping dialect
napping means what from the from the
main memory page number dip' I can tell
you to which frame of the cache memory
it is going to get loaded
so all this all this has to do number of
all this has to do number of pages are
visible to get loaded here all of them
but how many page can be gold loaded on
on a single print only one so from which
from which block it has come that will
be denoted by the respective tagging
numbers so which goes has got loaded
here 384 384 he is having the tag number
3 so there is a tag 3 in this particular
frame which pages can get loaded this
pages can get loaded this way it so it
is also 3 0 99 it is 3 1 0 0 okay in
this way so now this pages are provable
to get loaded here which page has got
loaded 129 it came from which tags 1
which fails have got loaded to which
that 0 which page has got loaded the
last one which stag first one so that is
the logic of this there is a logic of
this so in this race I am getting the
idea ok so this is known as direct
mapping where which page of the main
memory is getting loaded on to the cache
memory that can be decided in this
particular diagram so this diagram is
very attractive and very easy to
understand that which print is going so
now the thing is that one person might
come that in terms of direct mapping
which page replacement algorithm has to
be used
actually we shall go for the page
replacement algorithm later but if you
know we're going to get my point here
you say there is no page no page
replacement algorithm no page
replacement
building will be used in case of direct
mapping because from the very page
number I can easily get the respective
frame number so to which page to which
frames it is getting directed it is
quite commonly so that is no need to
part for many safety personnel get away
there are some ones I'm having a
confirmed ticket I'm having a confirmed
ticket on rail
okay after entering into my compartment
I'm finding that all seats are occupied
then which fashion to which person
should I request to make my statement
which person the person who is sitting
in my seat number so that is no
businessman algorithm is recurrent I
know that I should recruit that person
that he might have due to some mistake
might have set it in mind in my set so
that's why in case of direct mapping
there is no page replacement algorithm
because from the very page number I can
easily get the frame number so that is
the end of this particular direct
mapping will be coming with The
Associated mapping and sips associative
mapping please watch the next videos the
conception will get cleared then you
shall go for the numerical problems also
thanks for watching this one
particular video session is the cache
memory mapping cache memory mapping
means how the main memory data will get
mapped onto the cache memory and it is
not moved it is copy that means the data
will remain in the main memory and also
it's replicas will get dumped onto the
cache memory so how these things can be
done and what are the different logic or
what are the different way to do it can
be categorized into three different
categories so cache mapping can be
updated so one use your direct mapping
we are going to discuss this one right
now in the next video I shall go for
associative mapping and last one I shall
go for the fake absolute mapping
so direct mapping associative mapping
and set associative mapping let us
concern it on the direct mapping in this
particular case now the thing is that
for all the mapping I shall take the
same example so that you can feel that
in this in different mapping how the
situation's are getting graded so now
let us suppose I am considering that the
main memory is having 4 0 9 6 number of
pages or is the page the main memory
full main memory will be divided into
equal sized fragments equal size petals
all those fragments are having the equal
size then such so if we go on dividing
this main memory then I shall get 4 0 96
number of I shall get 4 0 9 6 number of
pages as I'm studying from 0 so the last
page number has become 4 0 9 5 but if
you go for the count it is 4 0 9 6
number of pages are there so each and
every page has got fatter number of
locations so here this location numbers
are considered at 16 locations per page
okay so that means how much memory were
having how much memory were having
whether it is 4 0 9 6 number of pages
each page is having 16 locations so what
is this this is to the power of 2 Mills
for and to deliver up 10 mins 1 0 to 6
this is all multiplying you are getting
4 0 9 takes in 2 to the power of 4 for
16 so we are getting to the product 16
so actually we are having this 16 bit
address so this memory is having 16 bit
address
so now if you consider this one we're
having 16 bit address out of them 12
bits will be denoting the page number
and 12 bits can have combinations to
this product 12 that is 4 0 9 6 that is
page number 0 to 4 0 9 5 and here we are
having 4 bit offset and it will be
denoting the page offset so that
fifteen locations markets who have taken
you might be asking me why this while
not a single buys or single locations
data is getting that while page wise
because you know that each and every
program has got locality of reference
what is locality of reference locality
of reference is that the instruction
which is executing now and the next
instruction which is going to get
executed probabilities hires that it
will be in the vicinity of the previous
instruction which is in execution right
now that is the next instruction which
is supposed to be executed will be near
going to the current instruction which
is getting executed right now this is
known as locality of reference right now
I'm talking about cache memory I think
next 10 to 12 statements whatever I
shall I shall make will be Han cache
memory also so in my speech that is
locality of reference so that is the
locality of reference so I'm guessing
that if I load ten locations content at
a time to the cache memory from the main
memory then for the some sigit of time
the program control will remain confined
within that page and each and every page
is of stem side and in the cache memory
now let me come to the cache memory I've
divided this total cache memory into one
zero two sorry
into 128 number of theories where each
and every frame size each and every
spring size is equal to the paper edge
because when one page will be going it
will be it will fit onto a single frame
so paste ID is equal to frame size that
is always universally true okay so how
many prints are you having in the cache
memory 128 a number of things if you
start from the frame number 0 what will
be the maximum frame number of this
plate is 127 so 1 2 index number of
frames are there so if we consider in
case of cache memory in case of cache
memory so to dilute the frame number I
request
Seventeen's because the members can have
your 128 combination and as I told you
that s size is equal to the frame size
so will be having four bits for the page
the page offset or the displacement so
cache memory at this bits will be
elephant and many memories that this
means will be 16 according to my example
it is not hard infers that always it
will be doing like this I am taking one
example so that I can go for the mapping
accordingly so that is the way it is
being done good next so C is equal to
128 here C is equal to capital C of
written so there is the cache memory
wave number and here is a capital P that
is the main memory space number is 4 0 9
3 now let me go for the direct method so
in this in this training while
discussing this direct might be okay in
terms of Ganic mapping what will happen
how many how many prints are there in
the cache memory how many prints 128
number of pairs so I shall mix 128 then
128 then 128 and so on in this way I am
dividing this main memory into 32 number
of blocks
why because you see if 4 0 96 is getting
divided by 128 because 128 pages in a
single block in this we are having 4 0
96 what is this it is to the point of it
is 2 to the power of 12 for John 9
stations to product well and this is
nothing but 2 to the power of 7 so when
the bases are equal then exponents will
be subtracted in case of division so to
the power of 5 and that is article that
means 0 to 31
they do not work now please remember
what is the name of this mapping dialect
napping means what from the from the
main memory page number dip' I can tell
you to which frame of the cache memory
it is going to get loaded
so all this all this has to do number of
all this has to do number of pages are
visible to get loaded here all of them
but how many page can be gold loaded on
on a single print only one so from which
from which block it has come that will
be denoted by the respective tagging
numbers so which goes has got loaded
here 384 384 he is having the tag number
3 so there is a tag 3 in this particular
frame which pages can get loaded this
pages can get loaded this way it so it
is also 3 0 99 it is 3 1 0 0 okay in
this way so now this pages are provable
to get loaded here which page has got
loaded 129 it came from which tags 1
which fails have got loaded to which
that 0 which page has got loaded the
last one which stag first one so that is
the logic of this there is a logic of
this so in this race I am getting the
idea ok so this is known as direct
mapping where which page of the main
memory is getting loaded on to the cache
memory that can be decided in this
particular diagram so this diagram is
very attractive and very easy to
understand that which print is going so
now the thing is that one person might
come that in terms of direct mapping
which page replacement algorithm has to
be used
actually we shall go for the page
replacement algorithm later but if you
know we're going to get my point here
you say there is no page no page
replacement algorithm no page
replacement
building will be used in case of direct
mapping because from the very page
number I can easily get the respective
frame number so to which page to which
frames it is getting directed it is
quite commonly so that is no need to
part for many safety personnel get away
there are some ones I'm having a
confirmed ticket I'm having a confirmed
ticket on rail
okay after entering into my compartment
I'm finding that all seats are occupied
then which fashion to which person
should I request to make my statement
which person the person who is sitting
in my seat number so that is no
businessman algorithm is recurrent I
know that I should recruit that person
that he might have due to some mistake
might have set it in mind in my set so
that's why in case of direct mapping
there is no page replacement algorithm
because from the very page number I can
easily get the frame number so that is
the end of this particular direct
mapping will be coming with The
Associated mapping and sips associative
mapping please watch the next videos the
conception will get cleared then you
shall go for the numerical problems also
thanks for watching this one
About this Video
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Oct 13, 2025
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