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**Design of Amplifier :**

Example -1 (Common Emitter Amplifier Design)

Design a common-emitter amplifier with a transistor having a β =200 and V_{BE} = 0.7 V. Obtain an overall gain of |A_{V} | ≥ 100 and maximum output voltage swing. Use the CE configuration shown in fig. 1 with two power supplies. R_{source} is the resistance associated with the source, v_{source}. Let R_{source}= 100 Ohms. The output load is 2KΩ. Determine the resistor values of the bias circuitry, the maximum undistorted output voltage swing, and the stage voltage gain.

**Solution:**

The maximum voltage across the amplifier is 10 V since the power supply can be visualized as a 10V power supply with a ground in the center. In this case, the ground has no significance to the operation of the amplifier since the input and output are isolated from the power supplies by capacitors.

We will have to select the value for R_{C} and we are really not given enough information to do so.

Let us choose R_{C} = R_{load}.

We don't have enough information to solve for R_{B} – we can't use the bias stability criterion since we don't have the value of R_{E} either. We will have to (arbitrarily) select a value of R_{B} or R_{E}. If this leads to a contradiction, or “bad” component values (e.g., unobtainable resistor values), we can come back and modify our choice. Let us select a value for R_{E} that is large enough to obtain a reasonable value of V_{BB}, Selecting R_{E} as 400Ω will not appreciably reduce the collector current yet it will help in maintaining a reasonable value of V_{BB}. Thus,

R_{B} = 0.1 β R_{E} = 0.1 (200)(400) = 8 K Ω

To insure that we have the maximum voltage swing at the output, we will use

**Note that we are carrying out our calculations to four places so that we can get accuracy to three places. The bias resistors are determined by-**

Since we designed the bias circuit to place the quiescent point in the middle of the ac load line, we can use

V_{out}(undistorted p-p) 1.8 (2.94 x 10-3 ) (2 K Ω || 2 K Ω ) =5.29 V

Now we can determine the gain of the amplifier itself.

Using voltage division, we can determine the gain of the overall circuit.

The value of R_{in} can be obtained as

Thus the overall gain of the amplifier is

This shows that the common-emitter amplifier provides high voltage gain. However, it is very noisy, it has a low input impedance, and it does not have the stability of the emitter resistor common emitter amplifier.

Design of Amplifier

Example-2 (Emitter-Resistor Amplifier Design)

Design an emitter-resistor amplifier as shown in fig. 2 to drive a 2 KΩ load using a pnp silicon transistor, V_{CC }= -24V, β = 200, Av = -10, and V_{BE} = -0.7 V. Determine all element values and calculate A_{i}, R_{in}, I_{CQ} and the maximum undistorted symmetrical output voltage swing for three values of R_{C} as given below:

1. R_{C }= R_{load}

2. R_{C} = 0.1 R_{load}

3.R_{C} = 10 R_{load}

Solution:

(a) R_{C} = R_{load}

We use the various equations derived in previous lecture in order to derive the parameters of the circuit.

From the voltage gain, we can solve for R'_{E}.

So r'_{E} = re + R_{E} = 100 Ω

We can find the quiescent value of the collector current I_{C} from the collector-emitter loop using the equation for the condition of maximum output swing.

Therefore,** **

This is small enough that we shall ignore it to find that R_{E} = 100 Ω. Since we now know β and R_{E}.

We can use the design guideline.

R_{B} = 0.1 β R_{E} = 2 k Ω

As designed earlier, the biasing circuitry can be designed in the same manner and given by

V_{BB} = -1.52 V

R_{1} = 2.14 K Ω

R_{2} = 3.6 K Ω

The maximum undistorted symmetrical peak to peak output swing is then

V_{out} (P-P) = 1.8 I_{CQ} (R_{load} || R_{C} ) = 13.5 V

Thus current gain A_{i} = -9.1

and input impedance R_{in} = 1.82 K Ω

(b) R_{C} = 0.1 R_{load}

we repeat the steps of parts (a) to find

R | R |

I | R |

r' | v |

R | A |

V | R |

(C) R_{C} =10 R_{load}

Once again, we follow the steps of part (a) to find

R | R |

I | R |

r' | v |

R | A |

V | R |

We now compare the results obtained Table-I for the purpose of making the best choice for R_{C}.

Table - 1 Comparsion for the three selections of R_{C}

It indicates that of the three given ratios of R_{C} to R_{load}, R_{C} = R_{load} has the most desirable performance in the CE amplifier stage.

It can be used as a guide to develop reasonable designs. In most cases, this choice will provide performance that meets specifications. In some applications, it may be necessary to do additional analysis to find the optimum ratio of R_{C} to R_{load}.

Design of Amplifier Example- 3 (Capacitor-Coupled Emitter-Resistor Amplifier Design) Design an emitter-resistor amplifier as shown in fig. 3 with A_{V} =-10, β =200 and R_{load} = 1K Ω.

A pnp transistor is used and maximum symmetrical output swing is required.

**Solution: **

As designed earlier, we shall chose R_{C} = R_{load} = 10 kΩ.

The voltage gain is given by

where R'_{E}= R_{E} + r'_{e}.

Substituting A_{V}, R_{load} and R_{C} in this equation, we find R'_{E}= 50 Ω.

We need to know the value of r'e to find R_{E}. We first find R_{ac} and R_{dc}, and then calculate the Q point as follows (we assume r'e is small, so R_{E} = R'_{E})

R_{ac} = R_{E} + R_{C} || R_{load} = 550 Ω

R_{dc} = R_{E} + R_{C} = 1050 Ω

Now, the first step is to calculate the quiescent collector current needed to place the Q-point into the center of the ac load line (i.e., maximum swing). The equation is

The quantity, r'_{e} , is found as follows

Then

R_{E} = 50 - r_{e} = 46.67 Ω

If there were a current gain or input resistance specification for this design, we would use it to solve for the value of R_{B}. Since is no such specification, we use the expression

R_{B} =0.1 β R_{E} = 0.1 (200) (46.6) = 932 Ω Then continuing with the design steps,

and

**The last equality assumes that r _{O} is large compared to R_{C}.**

**The maximum undistorted peak to peak output swing is given by **

**1.8 | I _{CQ} | ( R_{C} || R_{load} )=1.8 ( 0.0075 ) ( 500 ) = 6.75 V **

**The power delivered into the load and the maximum power dissipated by the transistor are found as**

**The load lines for this circuit are shown in fig. 4.**

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