Formula Sheets: A/D and D/A Converters, Sample and Hold Circuit | Digital Electronics - Electrical Engineering (EE) PDF Download

 Page 1


Formula Sheet for A/D and D/A Converters, Sample
and Hold Circuit (Digital Electronics) – GATE
1. Basic Concepts
• A/D Converter (ADC): Converts analog signal to digital code.
• D/A Converter (DAC): Converts digital code to analog signal.
• Sample and Hold Circuit: Captures and holds analog voltage for ADC conver-
sion.
2. Key Parameters
• Resolution: Number of bits (n) in digital output.
Number of levels = 2
n
• Step Size (Quantization Step):
? =
V
FS
2
n
where V
FS
is full-scale voltage.
• Quantization Error:
Q
e
=±
? 2
=±
V
FS
2
n+1
• Sampling Rate: f
s
=
1
Ts
, where T
s
is sampling period.
• Nyquist Theorem: f
s
= 2f
max
, where f
max
is the highest signal frequency.
3. D/A Converter (DAC)
• Weighted Resistor DAC:
V
out
= V
ref
·
(
b
n-1
2
1
+
b
n-2
2
2
+···+
b
0
2
n
)
where b
i
are binary inputs (0 or 1).
• R-2R Ladder DAC:
V
out
= V
ref
·
D
2
n
, D = b
n-1
2
n-1
+b
n-2
2
n-2
+···+b
0
• Resolution:
? V
out
=
V
ref
2
n
1
Page 2


Formula Sheet for A/D and D/A Converters, Sample
and Hold Circuit (Digital Electronics) – GATE
1. Basic Concepts
• A/D Converter (ADC): Converts analog signal to digital code.
• D/A Converter (DAC): Converts digital code to analog signal.
• Sample and Hold Circuit: Captures and holds analog voltage for ADC conver-
sion.
2. Key Parameters
• Resolution: Number of bits (n) in digital output.
Number of levels = 2
n
• Step Size (Quantization Step):
? =
V
FS
2
n
where V
FS
is full-scale voltage.
• Quantization Error:
Q
e
=±
? 2
=±
V
FS
2
n+1
• Sampling Rate: f
s
=
1
Ts
, where T
s
is sampling period.
• Nyquist Theorem: f
s
= 2f
max
, where f
max
is the highest signal frequency.
3. D/A Converter (DAC)
• Weighted Resistor DAC:
V
out
= V
ref
·
(
b
n-1
2
1
+
b
n-2
2
2
+···+
b
0
2
n
)
where b
i
are binary inputs (0 or 1).
• R-2R Ladder DAC:
V
out
= V
ref
·
D
2
n
, D = b
n-1
2
n-1
+b
n-2
2
n-2
+···+b
0
• Resolution:
? V
out
=
V
ref
2
n
1
4. A/D Converter (ADC)
• Flash ADC:
Number of comparators = 2
n
-1
• Successive Approximation ADC:
Conversion time = n·T
clk
where T
clk
is clock period.
• Counter Type ADC:
Max conversion time = (2
n
-1)·T
clk
• Dual Slope ADC:
V
in
=
T
2
T
1
·V
ref
where T
1
is ?xed integration time, T
2
is de-integration time.
5. Sample and Hold Circuit
• Purpose: Samples analog input and holds it constant during ADC conversion.
• Acquisition Time: Time to charge capacitor to input voltage.
t
acq
˜ 5·R·C
where R is switch resistance, C is hold capacitor.
• Aperture Time: Time switch takes to open.
• Droop Rate: Voltage drop during hold phase.
Droop rate =
I
leak
C
where I
leak
is leakage current.
6. Performance Metrics
• Integral Non-Linearity (INL): Deviation from ideal transfer function.
INL =
V
actual
-V
ideal
? • Di?erential Non-Linearity (DNL):
DNL =
V
step
-? ? 2
Page 3


Formula Sheet for A/D and D/A Converters, Sample
and Hold Circuit (Digital Electronics) – GATE
1. Basic Concepts
• A/D Converter (ADC): Converts analog signal to digital code.
• D/A Converter (DAC): Converts digital code to analog signal.
• Sample and Hold Circuit: Captures and holds analog voltage for ADC conver-
sion.
2. Key Parameters
• Resolution: Number of bits (n) in digital output.
Number of levels = 2
n
• Step Size (Quantization Step):
? =
V
FS
2
n
where V
FS
is full-scale voltage.
• Quantization Error:
Q
e
=±
? 2
=±
V
FS
2
n+1
• Sampling Rate: f
s
=
1
Ts
, where T
s
is sampling period.
• Nyquist Theorem: f
s
= 2f
max
, where f
max
is the highest signal frequency.
3. D/A Converter (DAC)
• Weighted Resistor DAC:
V
out
= V
ref
·
(
b
n-1
2
1
+
b
n-2
2
2
+···+
b
0
2
n
)
where b
i
are binary inputs (0 or 1).
• R-2R Ladder DAC:
V
out
= V
ref
·
D
2
n
, D = b
n-1
2
n-1
+b
n-2
2
n-2
+···+b
0
• Resolution:
? V
out
=
V
ref
2
n
1
4. A/D Converter (ADC)
• Flash ADC:
Number of comparators = 2
n
-1
• Successive Approximation ADC:
Conversion time = n·T
clk
where T
clk
is clock period.
• Counter Type ADC:
Max conversion time = (2
n
-1)·T
clk
• Dual Slope ADC:
V
in
=
T
2
T
1
·V
ref
where T
1
is ?xed integration time, T
2
is de-integration time.
5. Sample and Hold Circuit
• Purpose: Samples analog input and holds it constant during ADC conversion.
• Acquisition Time: Time to charge capacitor to input voltage.
t
acq
˜ 5·R·C
where R is switch resistance, C is hold capacitor.
• Aperture Time: Time switch takes to open.
• Droop Rate: Voltage drop during hold phase.
Droop rate =
I
leak
C
where I
leak
is leakage current.
6. Performance Metrics
• Integral Non-Linearity (INL): Deviation from ideal transfer function.
INL =
V
actual
-V
ideal
? • Di?erential Non-Linearity (DNL):
DNL =
V
step
-? ? 2
• Signal-to-Noise Ratio (SNR):
SNR (dB) = 6.02n+1.76
for ideal n-bit ADC.
• E?ective Number of Bits (ENOB):
ENOB =
SNDR-1.76
6.02
where SNDR is signal-to-noise-and-distortion ratio.
7. Errors in ADC/DAC
• O?set Error: Constant shift in output.
• Gain Error: Incorrect scaling of output.
• Missing Codes: Absent digital codes in ADC.
• Non-Monotonicity: Output decreases when input increases (DAC).
8. Sampling Theorem
• Nyquist Rate: f
s
= 2f
max
.
• Aliasing: Occurs if f
s
< 2f
max
, causing frequency overlap.
9. Types of ADC
• Flash: Fastest, high power, low resolution.
• Successive Approximation: Moderate speed, good for general use.
• Dual Slope: High accuracy, slow, used in digital multimeters.
• Sigma-Delta: High resolution, oversampling, noise shaping.
10. Design Considerations
• Resolution vs. Speed: Higher resolution reduces speed.
• Power Consumption: Flash ADC consumes more power than others.
• Capacitor Selection in S/H: Low leakage, high capacitance for stability.
• Applications: Data acquisition, signal processing, communication systems.
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