Formula Sheets: Basics of Digital Electronics | Analog and Digital Electronics - Electrical Engineering (EE) PDF Download

 Page 1


Formula Sheet for Basics of Digital Electronics
(Analog and Digital Electronics) – GATE
1. Number Systems
• DecimaltoBinaryConversion: Divideby2,recordremaindersinreverseorder.
• Binary to Decimal:
D =
n-1
?
i=0
b
i
·2
i
where b
i
: Binary digit, i: Position.
• Decimal to Hexadecimal: Divide by 16, convert remainders (09, AF).
• Hexadecimal to Decimal:
D =
n-1
?
i=0
h
i
·16
i
where h
i
: Hex digit (09, AF).
2. Binary Arithmetic
• Addition: S =A+B +C
in
, C
out
= (A·B)+(B·C
in
)+(A·C
in
).
• Subtraction: D =A-B =A+B +1 (2s complement).
• 2s Complement: Invert bits (B) and add 1.
B
2s comp
=B +1
3. Logic Gates
• AND: Y =A·B.
• OR: Y =A+B.
• NOT: Y =A.
• NAND: Y =A·B.
• NOR: Y =A+B.
• XOR: Y =A?B =AB +AB.
• XNOR: Y =A?B =AB +AB.
4. Boolean Algebra
• De Morgans Theorems:
A+B =A·B, A·B =A+B
• Basic Laws:
1
Page 2


Formula Sheet for Basics of Digital Electronics
(Analog and Digital Electronics) – GATE
1. Number Systems
• DecimaltoBinaryConversion: Divideby2,recordremaindersinreverseorder.
• Binary to Decimal:
D =
n-1
?
i=0
b
i
·2
i
where b
i
: Binary digit, i: Position.
• Decimal to Hexadecimal: Divide by 16, convert remainders (09, AF).
• Hexadecimal to Decimal:
D =
n-1
?
i=0
h
i
·16
i
where h
i
: Hex digit (09, AF).
2. Binary Arithmetic
• Addition: S =A+B +C
in
, C
out
= (A·B)+(B·C
in
)+(A·C
in
).
• Subtraction: D =A-B =A+B +1 (2s complement).
• 2s Complement: Invert bits (B) and add 1.
B
2s comp
=B +1
3. Logic Gates
• AND: Y =A·B.
• OR: Y =A+B.
• NOT: Y =A.
• NAND: Y =A·B.
• NOR: Y =A+B.
• XOR: Y =A?B =AB +AB.
• XNOR: Y =A?B =AB +AB.
4. Boolean Algebra
• De Morgans Theorems:
A+B =A·B, A·B =A+B
• Basic Laws:
1
– Identity: A+0 =A, A·1 =A.
– Null: A+1 = 1, A·0 = 0.
– Idempotent: A+A =A, A·A =A.
– Complement: A+A = 1, A·A = 0.
– Distributive: A(B +C) =AB +AC, A+BC = (A+B)(A+C).
5. Karnaugh Map (K-Map)
• Minimization: Group 1s in powers of 2 (1, 2, 4, 8) to simplify SOP (Sum of
Products).
• Number of Cells: 2
n
for n-variables.
• Dont Care Conditions: Use to optimize grouping.
6. Combinational Circuits
• Half Adder:
Sum =A?B, Carry =A·B
• Full Adder:
Sum =A?B?C
in
, Carry = (A·B)+(B·C
in
)+(A·C
in
)
• Multiplexer (MUX):
Y =S
0
S
1
...S
n
·I
2
n
where S
i
: Select lines, I
i
: Input lines.
• Decoder: 2
n
outputs for n-bit input.
Y
i
= 1 when input =i (binary).
7. Codes
• BCD(Binary-CodedDecimal): Eachdecimaldigitrepresentedby4bits(00001001).
• Gray Code: Adjacent codes di?er by one bit.
Gray
i
=b
i
?b
i+1
where b
i
: Binary bit.
• Excess-3 Code: BCD + 0011 (binary).
8. Logic Families
• TTL (Transistor-Transistor Logic):
2
Page 3


Formula Sheet for Basics of Digital Electronics
(Analog and Digital Electronics) – GATE
1. Number Systems
• DecimaltoBinaryConversion: Divideby2,recordremaindersinreverseorder.
• Binary to Decimal:
D =
n-1
?
i=0
b
i
·2
i
where b
i
: Binary digit, i: Position.
• Decimal to Hexadecimal: Divide by 16, convert remainders (09, AF).
• Hexadecimal to Decimal:
D =
n-1
?
i=0
h
i
·16
i
where h
i
: Hex digit (09, AF).
2. Binary Arithmetic
• Addition: S =A+B +C
in
, C
out
= (A·B)+(B·C
in
)+(A·C
in
).
• Subtraction: D =A-B =A+B +1 (2s complement).
• 2s Complement: Invert bits (B) and add 1.
B
2s comp
=B +1
3. Logic Gates
• AND: Y =A·B.
• OR: Y =A+B.
• NOT: Y =A.
• NAND: Y =A·B.
• NOR: Y =A+B.
• XOR: Y =A?B =AB +AB.
• XNOR: Y =A?B =AB +AB.
4. Boolean Algebra
• De Morgans Theorems:
A+B =A·B, A·B =A+B
• Basic Laws:
1
– Identity: A+0 =A, A·1 =A.
– Null: A+1 = 1, A·0 = 0.
– Idempotent: A+A =A, A·A =A.
– Complement: A+A = 1, A·A = 0.
– Distributive: A(B +C) =AB +AC, A+BC = (A+B)(A+C).
5. Karnaugh Map (K-Map)
• Minimization: Group 1s in powers of 2 (1, 2, 4, 8) to simplify SOP (Sum of
Products).
• Number of Cells: 2
n
for n-variables.
• Dont Care Conditions: Use to optimize grouping.
6. Combinational Circuits
• Half Adder:
Sum =A?B, Carry =A·B
• Full Adder:
Sum =A?B?C
in
, Carry = (A·B)+(B·C
in
)+(A·C
in
)
• Multiplexer (MUX):
Y =S
0
S
1
...S
n
·I
2
n
where S
i
: Select lines, I
i
: Input lines.
• Decoder: 2
n
outputs for n-bit input.
Y
i
= 1 when input =i (binary).
7. Codes
• BCD(Binary-CodedDecimal): Eachdecimaldigitrepresentedby4bits(00001001).
• Gray Code: Adjacent codes di?er by one bit.
Gray
i
=b
i
?b
i+1
where b
i
: Binary bit.
• Excess-3 Code: BCD + 0011 (binary).
8. Logic Families
• TTL (Transistor-Transistor Logic):
2
– Logic levels: V
OH
˜ 3.3V,V
OL
˜ 0.4V.
– Fan-out: 10.
• CMOS (Complementary MOS):
– Logic levels: V
OH
˜V
DD
,V
OL
˜ 0V.
– Power dissipation: P
dynamic
=C
L
V
2
DD
f.
• Propagation Delay: Time from input change to output change.
9. Minimization Techniques
• Sum of Products (SOP):
F =
?
m
i
(minterms)
• Product of Sums (POS):
F =
?
M
i
(maxterms)
• Quine-McCluskey: Tabular method for larger variables.
10. Design Considerations
• Fan-in: Number of inputs to a gate.
• Fan-out: Maximum number of gates driven by output.
• Noise Margin:
NM
H
=V
OH
-V
IH
, NM
L
=V
IL
-V
OL
• Applications: Combinational logic, arithmetic circuits, code converters.
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