Formula Sheets: I/O Interface | Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE) PDF Download

 Page 1


I/O In terface F orm ula Sheet
I/O In t erface Basics
• Definition : Hardw are/soft w are in terface b et w een CPU, memory , and p eripheral devices.
• Comp onen ts : I/O mo dules, buses, i n terface circuits, data comm unication pro cessors.
• P eripheral Devices : Input (k eyb oard, mouse), Output (monitor, prin ter), Storage (HDD, SSD).
• Data T ransfer Rate : R
transfer
=
S
data
T
transfer
, in b ytes/s.
• I/O Latency : T
IO
=T
access
+T
transfer
+T
pro cessing
, where T
access
is device seek time, T
pro cessing
is
CPU/I/O mo dule o v erhead.
• Bus Bandwidth : B
bus
=w·f
bus
, where w is bus width (bits), f
bus
is bus frequency (Hz).
Mo des of Data T ransfer
• Programmed I/O (PIO) :
– CPU p olls or w aits for device, T
PIO
=N ·(T
p ol l
+T
transfer
) , where N is n um b er of transfers.
– CPU Ov erhead: O
CPU
˜ 100% during transfer.
– T ransfer Time: T
transfer
=
S
data
R
device
, where R
device
is device data rate.
• In terrupt-Driv en I/O :
– Device signals CPU via in terrupt, T
in terrupt
=T
con text-switc h
+T
handler
+T
transfer
.
– Con text Switc h Time: T
con text-switc h
˜ 1-10µ s, includes sa ving/restoring N
regs
registers.
– In terrupt Latency: T
latency
=T
detect
+T
queue
+T
con text-switc h
, t ypically 10-100 µ s.
– In terrupt F requency: f
in t
, impacts CPU, O
CPU
?f
in t
·T
in terrupt
.
• Direct Memory A ccess (DMA) :
– DMA con troller transfers data, T
DMA
=T
setup
+
S
data
B
bus
.
– Setup Time: T
setup
˜ 1-10µ s, includes configuring DMA con troller.
– CPU Ov erhead: O
CPU
˜ 0% during transfer, only setup/in terrupt handling.
– Burst Mo de: T ransfer en tire blo c k, T
burst
=
S
blo c k
B
bus
.
– Cycle Stealing: CPU pauses, T
steal
=
S
data
B
bus
·
1
f
CPU
.
I/O Mo dules
• F unction : In terface CPU/memory with p eripherals, handle data buffering, con trol, error detec-
tion.
• Buffer Size : S
buffer
, reduces f
in t
, S
buffer
?
R
device
f in t
.
• Pro cessing Time : T
mo dule
=T
buffer
+T
con trol
+T
error-c hec k
, t ypically 1-10 µ s.
• Data Comm unication Pro cessor : Offloads proto col handling, T
DCP
? proto col complexit y.
• Mo dule Bandwidth : B
mo dule
= min(B
bus
,R
device
) .
1
Page 2


I/O In terface F orm ula Sheet
I/O In t erface Basics
• Definition : Hardw are/soft w are in terface b et w een CPU, memory , and p eripheral devices.
• Comp onen ts : I/O mo dules, buses, i n terface circuits, data comm unication pro cessors.
• P eripheral Devices : Input (k eyb oard, mouse), Output (monitor, prin ter), Storage (HDD, SSD).
• Data T ransfer Rate : R
transfer
=
S
data
T
transfer
, in b ytes/s.
• I/O Latency : T
IO
=T
access
+T
transfer
+T
pro cessing
, where T
access
is device seek time, T
pro cessing
is
CPU/I/O mo dule o v erhead.
• Bus Bandwidth : B
bus
=w·f
bus
, where w is bus width (bits), f
bus
is bus frequency (Hz).
Mo des of Data T ransfer
• Programmed I/O (PIO) :
– CPU p olls or w aits for device, T
PIO
=N ·(T
p ol l
+T
transfer
) , where N is n um b er of transfers.
– CPU Ov erhead: O
CPU
˜ 100% during transfer.
– T ransfer Time: T
transfer
=
S
data
R
device
, where R
device
is device data rate.
• In terrupt-Driv en I/O :
– Device signals CPU via in terrupt, T
in terrupt
=T
con text-switc h
+T
handler
+T
transfer
.
– Con text Switc h Time: T
con text-switc h
˜ 1-10µ s, includes sa ving/restoring N
regs
registers.
– In terrupt Latency: T
latency
=T
detect
+T
queue
+T
con text-switc h
, t ypically 10-100 µ s.
– In terrupt F requency: f
in t
, impacts CPU, O
CPU
?f
in t
·T
in terrupt
.
• Direct Memory A ccess (DMA) :
– DMA con troller transfers data, T
DMA
=T
setup
+
S
data
B
bus
.
– Setup Time: T
setup
˜ 1-10µ s, includes configuring DMA con troller.
– CPU Ov erhead: O
CPU
˜ 0% during transfer, only setup/in terrupt handling.
– Burst Mo de: T ransfer en tire blo c k, T
burst
=
S
blo c k
B
bus
.
– Cycle Stealing: CPU pauses, T
steal
=
S
data
B
bus
·
1
f
CPU
.
I/O Mo dules
• F unction : In terface CPU/memory with p eripherals, handle data buffering, con trol, error detec-
tion.
• Buffer Size : S
buffer
, reduces f
in t
, S
buffer
?
R
device
f in t
.
• Pro cessing Time : T
mo dule
=T
buffer
+T
con trol
+T
error-c hec k
, t ypically 1-10 µ s.
• Data Comm unication Pro cessor : Offloads proto col handling, T
DCP
? proto col complexit y.
• Mo dule Bandwidth : B
mo dule
= min(B
bus
,R
device
) .
1
Bus Arbitration and Structure
• Bus Arbitration : Resolv es conflicts for shared bus access.
– Cen tralized: Arbiter o v erhead, T
arb
˜ 1-2 cycles.
– Distributed: Daisy c hain or priorit y-based, T
arb
?N
devices
.
• Sync hronous Bus : Clo c k ed, T
transfer
=?
S
data
w
?·
1
f
bus
.
• Async hronous Bus : Handshak e-based, T
transfer
=T
req
+T
ac k
+
S
data
R
bus
.
• Bus Width : w , e.g., 32 or 64 bits, B
bus
=w·f
bus
.
• Arbitration Dela y : T
arb-dela y
=T
arb
·P
conflict
, w here P
conflict
?N
devices
.
Standard I/O In terfaces
• PCI Bus (P eripheral Comp onen t In terconnect) :
– Bandwidth: B
PCI
= 133-533 MB/s (32-bit, 33-66 MHz).
– Latency: T
PCI
˜ 100-200 ns, includes arbitration.
– Burst T ransfer: T
burst
=T
setup
+
S
data
B
PCI
.
• SCSI Bus (Small Computer System In terface) :
– Bandwidth: B
SCSI
= 5-640 MB/s (SCSI-1 to Ultra-640).
– Devices: N
devices
= 16 , T
arb
? logN
devices
.
– T ransfer Time: T
SCSI
=T
command
+T
data
+T
status
, t ypically 1-10 ms.
• USB (Univ ersal Serial Bus) :
– Bandwidth: B
USB
= 1.5 Mbps (USB 1.0) to 20 Gbps (USB 4.0).
– Latency: T
USB
˜ 1-10 ms, includes p olling.
– P ac k et T ransfer: T
pac k et
=
S
pac k et
B
USB
+T
o v erhead
, S
pac k et
= 1024 b ytes (USB 3 .0).
• P arallel vs. Serial P orts :
– P arallel: B
parallel
?w , e.g., 1-2 MB/s, but short distance.
– Serial: B
serial
?f
bus
, e.g., 115 Kbps (RS-232) to 20 Gbps (USB 4.0), longer distance.
In terrupts and Exceptions
• In terrupt T yp es : Hardw are (device-initiated), Soft w are (exceptions, traps).
• In terrupt Service Routine (ISR) : T
ISR
=T
con text-sa v e
+T
handler
+T
con text-restore
.
• Con text Sa v e Time : T
con text-sa v e
=N
regs
·T
mem
, t ypically 1-5 µ s.
• In terrupt Priorit y Lev els : N
lev els
, T
priorit y-resolv e
? logN
lev els
.
• Exception Handling : T
exception
=T
detect
+T
ISR
, e.g., page fault T
page-fault
˜ 10-20 ms.
• In terrupt Coalescing : Reduces f
in t
, T
coalesce
=T
buffer
+T
trigger
, impro v es throughput.
2
Page 3


I/O In terface F orm ula Sheet
I/O In t erface Basics
• Definition : Hardw are/soft w are in terface b et w een CPU, memory , and p eripheral devices.
• Comp onen ts : I/O mo dules, buses, i n terface circuits, data comm unication pro cessors.
• P eripheral Devices : Input (k eyb oard, mouse), Output (monitor, prin ter), Storage (HDD, SSD).
• Data T ransfer Rate : R
transfer
=
S
data
T
transfer
, in b ytes/s.
• I/O Latency : T
IO
=T
access
+T
transfer
+T
pro cessing
, where T
access
is device seek time, T
pro cessing
is
CPU/I/O mo dule o v erhead.
• Bus Bandwidth : B
bus
=w·f
bus
, where w is bus width (bits), f
bus
is bus frequency (Hz).
Mo des of Data T ransfer
• Programmed I/O (PIO) :
– CPU p olls or w aits for device, T
PIO
=N ·(T
p ol l
+T
transfer
) , where N is n um b er of transfers.
– CPU Ov erhead: O
CPU
˜ 100% during transfer.
– T ransfer Time: T
transfer
=
S
data
R
device
, where R
device
is device data rate.
• In terrupt-Driv en I/O :
– Device signals CPU via in terrupt, T
in terrupt
=T
con text-switc h
+T
handler
+T
transfer
.
– Con text Switc h Time: T
con text-switc h
˜ 1-10µ s, includes sa ving/restoring N
regs
registers.
– In terrupt Latency: T
latency
=T
detect
+T
queue
+T
con text-switc h
, t ypically 10-100 µ s.
– In terrupt F requency: f
in t
, impacts CPU, O
CPU
?f
in t
·T
in terrupt
.
• Direct Memory A ccess (DMA) :
– DMA con troller transfers data, T
DMA
=T
setup
+
S
data
B
bus
.
– Setup Time: T
setup
˜ 1-10µ s, includes configuring DMA con troller.
– CPU Ov erhead: O
CPU
˜ 0% during transfer, only setup/in terrupt handling.
– Burst Mo de: T ransfer en tire blo c k, T
burst
=
S
blo c k
B
bus
.
– Cycle Stealing: CPU pauses, T
steal
=
S
data
B
bus
·
1
f
CPU
.
I/O Mo dules
• F unction : In terface CPU/memory with p eripherals, handle data buffering, con trol, error detec-
tion.
• Buffer Size : S
buffer
, reduces f
in t
, S
buffer
?
R
device
f in t
.
• Pro cessing Time : T
mo dule
=T
buffer
+T
con trol
+T
error-c hec k
, t ypically 1-10 µ s.
• Data Comm unication Pro cessor : Offloads proto col handling, T
DCP
? proto col complexit y.
• Mo dule Bandwidth : B
mo dule
= min(B
bus
,R
device
) .
1
Bus Arbitration and Structure
• Bus Arbitration : Resolv es conflicts for shared bus access.
– Cen tralized: Arbiter o v erhead, T
arb
˜ 1-2 cycles.
– Distributed: Daisy c hain or priorit y-based, T
arb
?N
devices
.
• Sync hronous Bus : Clo c k ed, T
transfer
=?
S
data
w
?·
1
f
bus
.
• Async hronous Bus : Handshak e-based, T
transfer
=T
req
+T
ac k
+
S
data
R
bus
.
• Bus Width : w , e.g., 32 or 64 bits, B
bus
=w·f
bus
.
• Arbitration Dela y : T
arb-dela y
=T
arb
·P
conflict
, w here P
conflict
?N
devices
.
Standard I/O In terfaces
• PCI Bus (P eripheral Comp onen t In terconnect) :
– Bandwidth: B
PCI
= 133-533 MB/s (32-bit, 33-66 MHz).
– Latency: T
PCI
˜ 100-200 ns, includes arbitration.
– Burst T ransfer: T
burst
=T
setup
+
S
data
B
PCI
.
• SCSI Bus (Small Computer System In terface) :
– Bandwidth: B
SCSI
= 5-640 MB/s (SCSI-1 to Ultra-640).
– Devices: N
devices
= 16 , T
arb
? logN
devices
.
– T ransfer Time: T
SCSI
=T
command
+T
data
+T
status
, t ypically 1-10 ms.
• USB (Univ ersal Serial Bus) :
– Bandwidth: B
USB
= 1.5 Mbps (USB 1.0) to 20 Gbps (USB 4.0).
– Latency: T
USB
˜ 1-10 ms, includes p olling.
– P ac k et T ransfer: T
pac k et
=
S
pac k et
B
USB
+T
o v erhead
, S
pac k et
= 1024 b ytes (USB 3 .0).
• P arallel vs. Serial P orts :
– P arallel: B
parallel
?w , e.g., 1-2 MB/s, but short distance.
– Serial: B
serial
?f
bus
, e.g., 115 Kbps (RS-232) to 20 Gbps (USB 4.0), longer distance.
In terrupts and Exceptions
• In terrupt T yp es : Hardw are (device-initiated), Soft w are (exceptions, traps).
• In terrupt Service Routine (ISR) : T
ISR
=T
con text-sa v e
+T
handler
+T
con text-restore
.
• Con text Sa v e Time : T
con text-sa v e
=N
regs
·T
mem
, t ypically 1-5 µ s.
• In terrupt Priorit y Lev els : N
lev els
, T
priorit y-resolv e
? logN
lev els
.
• Exception Handling : T
exception
=T
detect
+T
ISR
, e.g., page fault T
page-fault
˜ 10-20 ms.
• In terrupt Coalescing : Reduces f
in t
, T
coalesce
=T
buffer
+T
trigger
, impro v es throughput.
2
P e rformance Metrics
• I/O Throughput : R
IO
= min(R
device
,B
bus
,B
mo dule
) , in b ytes/s.
• Effectiv e I/O Latency : T
eff
=T
IO
+P
in t
·T
in terrupt
+P
arb
·T
arb-dela y
, whereP
in t
,P
arb
are in terrupt
and arbitration probabilities.
• CPU Utilization : U
CPU
= 1-
?
(f
in ti
·T
ISRi
) , higher with DMA vs. PIO.
• DMA E?iciency : E
DMA
=
T
transfer
T
DMA
, approac hes 1 for large S
data
.
• Bus Utilization : U
bus
=
T
transfer
T
total
, reduced b y arbitration, T
arb
?N
devices
.
• Amdahl’s La w : Sp eedup S =
1
(1-P)+
P
k
, where P is I/O-b ound fraction, k is I/O sp eedup (e.g.,
DMA vs. PIO).
Applications and Concepts
• I/O Mo dules : Enable mo dularit y , T
mo dule
critical for high-sp eed devices (e.g., SSD).
• DMA : Essen tial for bulk transfers (e.g., disk, net w ork), minimizes O
CPU
.
• In terrupts : Key for async hronous I/O, T
latency
affects real-time systems.
• Standard In terfaces : PCI (high-sp eed), SC SI (storage), USB (v ersatile), optimize B
bus
.
• Bus Arbitration : Critical in m ulti-device systems, T
arb-dela y
impacts R
IO
.
• Serial vs. P arallel : Serial (USB) dominates due to scalabilit y , B
serial
» B
parallel
in mo dern
systems.
3