Formula Sheets: Thyristors | Power Electronics - Electrical Engineering (EE) PDF Download

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P o w er Electronics: Th yristors F orm ula Sheet for
Electrical GA TE
Th y ristor (SCR) Characteristics
• V-I Characteristics : F orw ard and rev erse blo c king, forw ard conduction.
I
A
= I
S
(
e
V
AK
nV
T
-1
)
(in conduction)
where I
A
is ano de curre n t, V
AK
is ano de-catho de v oltage, I
S
is saturation curren t, n
is idealit y factor, V
T
=
kT
q
˜ 25mV at ro om temp erature.
• F orw ard V oltage Drop : During conduction.
V
AK
˜ 1V-2V
• Holding Curren t (I
H
) : Minim um curren t to main tain conduction.
• Latc hing Curren t (I
L
) : Minim um curren t to trigger full conduction.
Gate T riggering
• Gate T riggering Curren t and V oltage : Minim um gate curren t (I
G
) and v oltage
(V
G
) required to turn on SCR.
I
G
> I
G( min)
, V
G
> V
G( min)
• Gate P o w er Dissipation :
P
G
= V
G
I
G
• T urn-On Time :
t
on
= t
d
+t
r
where t
d
is dela y time, t
r
is rise time.
Comm utation
• T urn-Off Time ( t
q
) : Time required for SCR to regain blo c king state.
t
q
= t
rr
+t
gr
where t
rr
is rev erse reco v ery time, t
gr
is gate reco v ery time.
• Critical Rate of Rise of V oltage (dv/dt ) : Maxim um rate to a v oid false triggering.
dv
dt
<
(
dv
dt
)
max
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Page 2


P o w er Electronics: Th yristors F orm ula Sheet for
Electrical GA TE
Th y ristor (SCR) Characteristics
• V-I Characteristics : F orw ard and rev erse blo c king, forw ard conduction.
I
A
= I
S
(
e
V
AK
nV
T
-1
)
(in conduction)
where I
A
is ano de curre n t, V
AK
is ano de-catho de v oltage, I
S
is saturation curren t, n
is idealit y factor, V
T
=
kT
q
˜ 25mV at ro om temp erature.
• F orw ard V oltage Drop : During conduction.
V
AK
˜ 1V-2V
• Holding Curren t (I
H
) : Minim um curren t to main tain conduction.
• Latc hing Curren t (I
L
) : Minim um curren t to trigger full conduction.
Gate T riggering
• Gate T riggering Curren t and V oltage : Minim um gate curren t (I
G
) and v oltage
(V
G
) required to turn on SCR.
I
G
> I
G( min)
, V
G
> V
G( min)
• Gate P o w er Dissipation :
P
G
= V
G
I
G
• T urn-On Time :
t
on
= t
d
+t
r
where t
d
is dela y time, t
r
is rise time.
Comm utation
• T urn-Off Time ( t
q
) : Time required for SCR to regain blo c king state.
t
q
= t
rr
+t
gr
where t
rr
is rev erse reco v ery time, t
gr
is gate reco v ery time.
• Critical Rate of Rise of V oltage (dv/dt ) : Maxim um rate to a v oid false triggering.
dv
dt
<
(
dv
dt
)
max
1
• Critical Rate of Rise of Curren t (di/dt ) : Maxim um rate to a v oid damage.
di
dt
<
(
di
dt
)
max
• Class A Comm utation (Self-Comm utation) : F or resonan t circuits.
I
A
= I
0
sin(?t)
where I
0
is p eak curren t, ? =
1
v
LC
.
TRIA Cs and GTOs
• TRIA C : Bidirectional conducti on.
IizeazI
MT1
= I
MT2
= I
A
(symmetric in b oth directions)
• GTO (Gate T urn-Off Th yristor) : T urn-off via negativ e gate pulse.
I
G
<-I
G( min)
• GTO T urn-Off Gain :
ß
off
=
I
A
I
G
Protection Mec hanisms
• Sn ubb er Circuit : Protects against dv/dt .
R =
V
max
?CV
max
, C =
1
?R
where R and C are sn ubb er resistance and capacitance, V
max
is maxim um v oltage.
• Thermal Resistance : Junction-to-case thermal resistance.
?
JC
=
T
J
-T
C
P
where T
J
is junction temp erature, T
C
is case temp erature, P is p o w er dissipation.
Key N otes
• T ypical V alues : V
AK
˜ 1V2V , I
H
and I
L
t ypically in mA range.
• Safe Op erating Area (SO A) : Ensure op eration within v oltage, curren t, and thermal
limits.
• Sn ubb er Design : Cho ose R and C to limit dv/dt and di/dt .
• Applications : SCRs for rectifiers, in v erters; TRIA Cs for A C con trol; GTOs for high-
p o w er switc hing.
• Units : Use SI units for GA TE (e.g., V , A , s ).
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