MOSFET Biasing & Amplifiers | Analog Circuits - Electronics and Communication Engineering (ECE) PDF Download

Introduction

In this article, you will find the Circuits Analysis and Applications of Diodes, BJT, FET and MOSFET which will cover the topics such as Basics of MOSFET, Drain Current equation for Triode and Saturation Region, Operating Condition of MOSFET, MOS Transconductance, Different biasing methods of MOSFET.

Basics of MOSFET

• A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is a field effect transistor (FET with an insulated gate) where the voltage determines the conductivity of the device. It is used for switching or amplifying signals. 
• The ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. MOSFETs are now even more common than BJTs in digital and analog circuits.
  
  MOSFET Structure

Drain Current Equation

•  
  where μ_n = mobility of electron
  C_ox = Capacitance of oxide layer
  Cox = ε_ox/t_ox, ε_r = 3.9 for SiO₂
• ε_ox = 3.9ε₀
  = 3.9 x 8.85 x 10^-12 F/m
  = 3.45 x 10^-11 F/m
  W/L → aspect ratio
  V_DS = drain to source voltage

There are three possible regions for the working of the MOSFET:

1. Triode Region
2. Cut-off Region
3. Saturation Region

1. Triode Region

• V_DS < V_GS – V_t, if V_DS (mV)
• I_D = μ_nC_ax(W/L)(V_GS-V_T)V_DS
• R_DS = V_DS/I_D =

2. Current Saturation

• V_DS ≥ V_GS – V_t
• (V_DS)_Sat = V_GS – V_t
• I_D = 1/2(μ_nC_ox(W/L)(V_GS-V_t)²
• 1/2_nC_ox(W/L)=k_n Transconductance parameter) mA/V₂
  → g_m should be more, so k_n should be more μ_n → faster, gain → higher.
  → A good MOSFET should have high value of k_n
• I_D = k_n(V_GS-V_t)²
  ∴g_m = ∂I_D/∂V_as = 2k_n(V_GS-V_t)

Operating Condition for MOSFET

Table: Operating Condition for N channel Enhancement type MOSFET.

Table: Operating Condition for P channel Enhancement type MOSFET.

Table: Operating Condition for N channel depletion type MOSFET.

Table: Operating Condition for P channel depletion type MOSFET.

MOS Transconductance

• As a voltage-controlled source, a MOS transistor can be characterized by its transconductance
  
• Various dependencies of g_m:
  

Different biasing methods of MOSFET

There are four biasing methods for MOSFET:

1. Drain to gate bias
2. Voltage divider bias
3. Fixed bias
4. Self-bias

1. Drain to Gate Bias Configuration
Drain to gate bias Configuration is shown below:

DC Equivalent of above circuit:

DC Analysis:

• Gate current, I_G =0
• So, we have voltage drop across resistance R_G = V_RG = 0
• Therefore, we get a direct connection between drain and source i.e. VD = VG
  V_DS = V_GS
• Note: Drain to gate bias always enables MOSFET in saturation region
  For output circuit, we have V_DS = V_DD – I_DR_D

2. Voltage Divider Bias Configuration
Voltage Divider Configuration is show below:

DC Equivalent:

DC – ANALYSIS:

• Using voltage divider, gate voltage is obtained by:
  
• Applying KVL is loop 1, we get
  V_G – V_GS – I_DR_S = 0
  V_GS = V_G – I_DR_S …. (1)
• Assume that MOSFET is in saturation, so we have I_D = K_n (V_GS – V_TN)²
• By solving the quadratic equation, determine the value of V_GS or I_D, then apply KVL in source to drain loop
  V_DD – I_DR_D – V_DS – I_SR_S = 0
  V_DS = V_DD – I_D (R_S + R_D)
• If V_DS > V_GS – V_TN, then the transistor is indeed biased in saturation region, as we have assumed.
• However, if V_DS < V_DS (sat), then transistor is biased in the non saturation region
  Therefore from equation (1)
  V_GS = V_G – I_DR_S
  

3. Fixed bias Configuration

Fixed bias Configuration is shown below:
 
DC Equivalent:

(In DC model, R_G is short and input impedance is very high i.e. (I_G ≃ 0))

Drawback of fixed bias: It is a dual battery design which makes it expensive and more space occupied bias Configuration.

4. Self-bias Configuration
Self Bias Configuration is shown below:

DC Equivalent:


DC ANALYSIS:
0 = V_GS + I_DR_S
V_GS = – I_DR_S