Modes of DMA Transfer | Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE) PDF Download

Introduction

In this article we will try to understand the details associated with the DMA (Direct Memory Access) like what exactly DMA is or how it works and also further we will see various modes of DMA Transfer (like Burst mode and other modes). Before directly jumping into the details associated with the modes of DMA transfer let us first try to understand what exactly DMA is and how does this DMA actually works.

Direct Memory Access (DMA)

DMA basically stands for Direct Memory Access. It is a process which enables data transfer between the Memory and the IO (Input/ Output) device without the need of or you can say without the involvement of CPU during data transfer.

Working of DMA

Following list of points will describe briefly about DMA and its working as follows.

• For DMA, you basically need a hardware called DMAC (Direct Memory Access Controller) which will help in the throughout process of data transfer between the Memory and IO device directly.
• First what happens is IO device sends the DMA request to DMA Controller, then further DMAC device sends HOLD signal to CPU by which it asks CPU for several information which are needed while transferring data.
• CPU then shares two basic information with DMAC before the Data transfer which are: Starting address (memory address starting from where data transfer should be performed) and Data Count (no of bytes or words to be transferred).
• CPU then sends HLDACK (Hold Acknowledgement) back to DMAC illustrating that now DMAC can successfully pass on the information.
• Then further DMAC shares the DMA ACK (DMA Acknowledgement) to the IO device which would eventually let IO device to access or transfer the data from memory in a direct and efficient manner.

Modes of DMA Transfer

Now after getting some brief idea about DMA and its working it’s the time to analyze Modes of DMA Transfer.

• During the DMA Transfer CPU can perform only those operation in which it doesn’t require the access of System Bus which means mostly CPU will be in blocked state.
• For how much time CPU remains in the blocked state or we can say for how much time CPU will give the control of DMAC of system buses will actually depend upon the following modes of DMA Transfer and after that CPU will take back control of system buses from DMAC.

Mode-1: Burst Mode

• In this mode Burst of data (entire data or burst of block containing data) is transferred before CPU takes control of the buses back from DMAC.
• This is the quickest mode of DMA Transfer since at once a huge amount of data is being transferred.
• Since at once only the huge amount of data is being transferred so time will be saved in huge amount.

Percentage of Time CPU remains blocked :

Let time taken to prepare the data be Tx and time taken to transfer the data be Ty. Then percentage of time CPU remains blocked due to DMA is as follows.

Percentage of time CPU remains in blocked state = Ty * 100% / Tx + Ty

Mode-2 : Cycle Stealing Mode

• Slow IO device will take some time to prepare data (or word) and within that time CPU keeps the control of the buses.
• Once the data or the word is ready CPU give back control of system buses to DMAC for 1-cycle in which the prepared word is transferred to memory.
• As compared to Burst mode this mode is little bit slowest since it requires little bit of time which is actually consumed by IO device while preparing the data.

Percentage of Time CPU remains blocked :

Let time taken to prepare data be Tx and time taken to transfer the data be Ty. Then percentage of time CPU remains blocked due to DMA is as follows.

Percentage of time CPU remains in blocked state = Ty * 100% / Tx

Mode-3: Interleaving Mode

• Whenever CPU does not require the system buses then only control of buses will be given to DMAC.
• In this mode, CPU will not be blocked due to DMA at all.
• This is the slowest mode of DMA Transfer since DMAC has to wait might be for so long time to just even get the access of system buses from the CPU itself.
• Hence due to which less amount of data will be transferred.

Example : Consider a device operating on 2MBPs speed and transferring the data to memory is done using Cycle Stealing mode. It takes 2 microseconds to transfer 16 bytes of data to memory when it is ready or prepared. Then for what percentage of time CPU is blocked due to DMA transfer?

Internal data preparation speed given =          2 MBPs. 

So for preparing 2 MB it takes   ------>           1 second

For preparing 1B it takes           ------->          1 second / 2MB

So now for 16B data preparation it takes ------->1 second  * 16B / 2MB

(after reciprocating Mega will be become micro 

(that is 10^6 will become 10^-6 after reciprocating))

therefore for preparation 16B it takes -------> 8 microseconds

Therefore percentage of time CPU remains blocked in case of 

Cycle Stealing mode = 2 * 100% / 8 = 25%