# Problem Solving on Instruction Format Notes | Study Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE)

## Computer Science Engineering (CSE): Problem Solving on Instruction Format Notes | Study Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE)

The document Problem Solving on Instruction Format Notes | Study Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE) is a part of the Computer Science Engineering (CSE) Course Computer Architecture & Organisation (CAO).
All you need of Computer Science Engineering (CSE) at this link: Computer Science Engineering (CSE)

An instruction format defines the different component of an instruction. The main components of an instruction are opcode (which instruction to be executed) and operands (data on which instruction to be executed). Here are the different terms related to instruction format:

• Instruction set size: It tells the total number of instructions defined in the processor.
• Opcode size: It is the number of bits occupied by the opcode which is calculated by taking log of instruction set size.
• Operand size: It is the number of bits occupied by the operand.
• Instruction size: It is calculated as sum of bits occupied by opcode and operands.

In this article, we will discuss different types of problems based on instruction format which are asked in GATE. For details about different types of instruction formats, you can refer: Instruction Formats
Type 1: Given instruction set size and operands size and their count, find the size of the instruction.

In this type of questions, you will be given the size of instruction set, number of operands and their size, you have to find out the size of the instruction.

Ques.1. Consider a processor with 64 registers and an instruction set of size twelve. Each instruction has five distinct fields, namely, opcode, two source register identifiers, one destination register identifier, and a twelve-bit immediate value. Each instruction must be stored in memory in a byte-aligned fashion. If a program has 100 instructions, the amount of memory (in bytes) consumed by the program text is ____________. (GATE 2016)
(a) 100
(b) 200
(c) 400
(d) 500
Solution: It can be approached as:

• The instruction consists of opcode and operands. Given the instruction set of size 12, 4 bits are required for opcode (2^4 = 16).
• As there are total 64 registers, 6 bits are required for identifying a register.
• As the instruction contains 3 registers (2 source + 1 designation), 3 * 6 = 18 bit are required for register identifiers.
• 12 bits are required for immediate value as given.
• Total bits for an instruction = 4 + 18 + 12 = 34 bits
• The instructions are required to be stored in a byte-aligned fashion. The nearest byte boundary after 34 bits is at 40 bits (5 bytes).
• Hence, for 100 instructions, the memory required is 5 * 100 = 500 bytes, and the correct option is (D).

Type 2: Given instruction size, opcode size and size of some operands, find the size and maximum value of remaining operands.

In this type of questions, you will be given the size of instruction, size of opcode, number of operands and size of some operands, you have to find out the size or maximum value of remaining operands.

Ques.2. A processor has 40 distinct instructions and 24 general purpose registers. A 32-bit instruction word has an opcode, two registers operands and an immediate operand. The number of bits available for the immediate operand field is_______. (GATE CS 2016)
Solution:
It can be approached as:

• As the processor has 40 instructions, number of bits for opcode = 6 (26 = 64)
• As the processor has 24 register, number of bits for one register = 5 (25 = 32)
• Total bits occupied by 2 registers and opcode = 6 + 5 + 5 =16.
• As instruction size given is 32 bits, remaining bit left for operand = 32-16 = 16 bits.

Ques.3. A machine has a 32-bit architecture, with 1-word long instructions. It has 64 registers, each of which is 32 bits long. It needs to support 45 instructions, which have an immediate operand in addition to two register operands. Assuming that the immediate operand is an unsigned integer, the maximum value of the immediate operand is ___________. (GATE CS 2014)
Solution:
It can be approached as:

• As machine has 32-bit architecture, therefore, 1 word = 32 bits = instruction size
•  As the processor has 64 register, number of bits for one register = 6 (26 = 64)
•  As the processor has 45 instructions, number of bits for opcode = 6 (26 = 64)
•  Total bits occupied by 2 registers and opcode = 6 + 6 + 6 =18.
•  As instruction size given is 32 bits, remaining bit left for immediate operand = 32-18 = 14 bits.
•  Maximum unsigned value using 14 bits = 214 – 1 = 16383 which is the answer.

Type 3: Instruction format with different categories of instruction

In this type of questions, you will be given different categories of instructions. You have to find maximum possible instructions of a given type.

Ques.4. A processor has 16 integer registers (R0, R1, … , R15) and 64 floating point registers (F0, F1, … , F63). It uses a 2 byte instruction format. There are four categories of instructions: Type-1, Type-2, Type-3, and Type 4. Type-1 category consists of four instructions, each with 3 integer register operands (3Rs). Type-2 category consists of eight instructions, each with 2 floating point register operands (2Fs). Type-3 category consists of fourteen instructions, each with one integer register operand and one floating point register operand (1R+1F). Type-4 category consists of N instructions, each with a floating point register operand (1F).
The maximum value of N is ________. (GATE-CS-2018)
Solution:
It can be approached as:

• As machine has 2 byte = 16 bits instruction format, therefore, possible encodings = 216
• As the processor has 16 integer register, number of bits for one integer register = 4 (24 = 16)
• As the processor has 64 floating point register, number of bits for one floating point register = 6 (26 = 64).
• For type-1 category having 4 instructions each having 3 integer register operands (4*3 = 12 bits) will consume 4 * 212 = 214 encodings.
• For type-2 category having 8 instructions each having 2 floating point register operands (2*6 = 12 bits) will consume 8 * 212 = 215 encodings.
• For type-3 category having 14 instructions each having 1 integer register and 1 floating point register operands (4 + 6 = 10 bits) will consume 14 * 210 = 14336 encodings.
• For type-4 category instructions, number of encodings left = 216 – 214 – 215 – 14336 = 2048.
• For type-4 category having N instructions each having 1 floating point register operand (6 bits) will consume N* 26 = 2048 (calculated from previous step). Therefore, N = 32.
The document Problem Solving on Instruction Format Notes | Study Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE) is a part of the Computer Science Engineering (CSE) Course Computer Architecture & Organisation (CAO).
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