Semiconductor Electronics Practice Questions - DPP for JEE

 Page 1


1. (d) Here, n
i
 = 10
16
 m
–3
, n
h
 = 5 × 10
22
 m
–3
As n
e
n
h
 = n
i
? 2
2. (d) ?I
E
 = 8.0 mA
?I
C
 = 7.9 mA
Also, 
3. (b) Output of upper AND gate =
Output of lower AND gate = 
? Output of OR gate, 
This is boolean expression for XOR gate.
4. (a)
By expanding this Boolen expression
Thus the truth table for this expression should be (a).
5. (d) Here, R = 4 k? = 4 × 10
3 
?
V
i
 = 60 V
Zener voltage V
z
 = 10 V
R
L
 = 2 k? = 2 × 10
3
 ?
Page 2


1. (d) Here, n
i
 = 10
16
 m
–3
, n
h
 = 5 × 10
22
 m
–3
As n
e
n
h
 = n
i
? 2
2. (d) ?I
E
 = 8.0 mA
?I
C
 = 7.9 mA
Also, 
3. (b) Output of upper AND gate =
Output of lower AND gate = 
? Output of OR gate, 
This is boolean expression for XOR gate.
4. (a)
By expanding this Boolen expression
Thus the truth table for this expression should be (a).
5. (d) Here, R = 4 k? = 4 × 10
3 
?
V
i
 = 60 V
Zener voltage V
z
 = 10 V
R
L
 = 2 k? = 2 × 10
3
 ?
Load current, I
L
 =  = 5 m?
Current through R, ?  = 
=  = 12.5 m?
From circuit diagram,
I = I
Z
 + I
L
? 12.5 = I
Z
 + 5
? I
Z 
= 12.5 – 5 = 7.5 mA.
6. (c)
7. (a) I
m
 = =  = 24.75 mA
I
dc
 = =  = 7.87 mA
I
rms
 =  = = 12.37 mA
P
dc
  = I
dc
? 2
 × R
L
  = (7.87 × 10
–3
)
2
 × 10
3
 = 61.9 mW
P
ac
 = I
rms
 
2
(R
f
 + R
L
) = (12.37 × 10
–3
)
2
 × (10 + 1000)
= 154.54 mW
Rectifier efficiency
? =  × 100 =  × 100 = 40.05%
8. (b) D
2
 is forward biased whereas D
1
 is reversed biased.
So effective resistance of the circuit
R = 4 + 2 = 6?
Page 3


1. (d) Here, n
i
 = 10
16
 m
–3
, n
h
 = 5 × 10
22
 m
–3
As n
e
n
h
 = n
i
? 2
2. (d) ?I
E
 = 8.0 mA
?I
C
 = 7.9 mA
Also, 
3. (b) Output of upper AND gate =
Output of lower AND gate = 
? Output of OR gate, 
This is boolean expression for XOR gate.
4. (a)
By expanding this Boolen expression
Thus the truth table for this expression should be (a).
5. (d) Here, R = 4 k? = 4 × 10
3 
?
V
i
 = 60 V
Zener voltage V
z
 = 10 V
R
L
 = 2 k? = 2 × 10
3
 ?
Load current, I
L
 =  = 5 m?
Current through R, ?  = 
=  = 12.5 m?
From circuit diagram,
I = I
Z
 + I
L
? 12.5 = I
Z
 + 5
? I
Z 
= 12.5 – 5 = 7.5 mA.
6. (c)
7. (a) I
m
 = =  = 24.75 mA
I
dc
 = =  = 7.87 mA
I
rms
 =  = = 12.37 mA
P
dc
  = I
dc
? 2
 × R
L
  = (7.87 × 10
–3
)
2
 × 10
3
 = 61.9 mW
P
ac
 = I
rms
 
2
(R
f
 + R
L
) = (12.37 × 10
–3
)
2
 × (10 + 1000)
= 154.54 mW
Rectifier efficiency
? =  × 100 =  × 100 = 40.05%
8. (b) D
2
 is forward biased whereas D
1
 is reversed biased.
So effective resistance of the circuit
R = 4 + 2 = 6?
.
9. (b) It is a p-n-p transistor with R as base.
10. (c) (W + X) · (W + Y) = W + (X · Y)
11. (d) In pure semiconductor electron-hole pair = 7 × 10
15
/m
3
n
initial 
= n
h
 + n
e
 = 14 × 10
15
 after doping donor Impurity
N
D
 =  = 5 × 10
21 
and  n
e
 =  = 2.5 × 10
21
So, n
final 
= n
h
 + n
e
? n
final
 ˜ n
e
 ˜ 2.5 × 10
21
 ( Q n
e
 >> n
h
)
Factor = 
=  ˜ = 1.8 × 10
5
12. (d) Voltage gain G = ß 
? G = 25 ...(i)
Transconductance g
m
 = 
? R
in
 =  = 
Putting this value of R
in
 in eqn. (i)
G = 25  × 0.03 ...(ii)
? G’ = 20  × 0.02 ...(iii)
From eqs. (ii) and (iii)
Page 4


1. (d) Here, n
i
 = 10
16
 m
–3
, n
h
 = 5 × 10
22
 m
–3
As n
e
n
h
 = n
i
? 2
2. (d) ?I
E
 = 8.0 mA
?I
C
 = 7.9 mA
Also, 
3. (b) Output of upper AND gate =
Output of lower AND gate = 
? Output of OR gate, 
This is boolean expression for XOR gate.
4. (a)
By expanding this Boolen expression
Thus the truth table for this expression should be (a).
5. (d) Here, R = 4 k? = 4 × 10
3 
?
V
i
 = 60 V
Zener voltage V
z
 = 10 V
R
L
 = 2 k? = 2 × 10
3
 ?
Load current, I
L
 =  = 5 m?
Current through R, ?  = 
=  = 12.5 m?
From circuit diagram,
I = I
Z
 + I
L
? 12.5 = I
Z
 + 5
? I
Z 
= 12.5 – 5 = 7.5 mA.
6. (c)
7. (a) I
m
 = =  = 24.75 mA
I
dc
 = =  = 7.87 mA
I
rms
 =  = = 12.37 mA
P
dc
  = I
dc
? 2
 × R
L
  = (7.87 × 10
–3
)
2
 × 10
3
 = 61.9 mW
P
ac
 = I
rms
 
2
(R
f
 + R
L
) = (12.37 × 10
–3
)
2
 × (10 + 1000)
= 154.54 mW
Rectifier efficiency
? =  × 100 =  × 100 = 40.05%
8. (b) D
2
 is forward biased whereas D
1
 is reversed biased.
So effective resistance of the circuit
R = 4 + 2 = 6?
.
9. (b) It is a p-n-p transistor with R as base.
10. (c) (W + X) · (W + Y) = W + (X · Y)
11. (d) In pure semiconductor electron-hole pair = 7 × 10
15
/m
3
n
initial 
= n
h
 + n
e
 = 14 × 10
15
 after doping donor Impurity
N
D
 =  = 5 × 10
21 
and  n
e
 =  = 2.5 × 10
21
So, n
final 
= n
h
 + n
e
? n
final
 ˜ n
e
 ˜ 2.5 × 10
21
 ( Q n
e
 >> n
h
)
Factor = 
=  ˜ = 1.8 × 10
5
12. (d) Voltage gain G = ß 
? G = 25 ...(i)
Transconductance g
m
 = 
? R
in
 =  = 
Putting this value of R
in
 in eqn. (i)
G = 25  × 0.03 ...(ii)
? G’ = 20  × 0.02 ...(iii)
From eqs. (ii) and (iii)
Voltage gain of new transistor G’ =  G
13. (a) Positive terminal is at higher potential (–5V) and negative terminal
is at lower potential –10 V.
14. (d) Energy band gap range is given by,
For visible region ? = (4 × 10
–7
 ~ 7 × 10
–7
)m
= 
= 
E
g
 = 1.75 eV
15. (d)
The output voltage, across the load R
C
V
0
 = I
C
 R
C
 = 2
The collector current
Current gain (ß)
= 
Page 5


1. (d) Here, n
i
 = 10
16
 m
–3
, n
h
 = 5 × 10
22
 m
–3
As n
e
n
h
 = n
i
? 2
2. (d) ?I
E
 = 8.0 mA
?I
C
 = 7.9 mA
Also, 
3. (b) Output of upper AND gate =
Output of lower AND gate = 
? Output of OR gate, 
This is boolean expression for XOR gate.
4. (a)
By expanding this Boolen expression
Thus the truth table for this expression should be (a).
5. (d) Here, R = 4 k? = 4 × 10
3 
?
V
i
 = 60 V
Zener voltage V
z
 = 10 V
R
L
 = 2 k? = 2 × 10
3
 ?
Load current, I
L
 =  = 5 m?
Current through R, ?  = 
=  = 12.5 m?
From circuit diagram,
I = I
Z
 + I
L
? 12.5 = I
Z
 + 5
? I
Z 
= 12.5 – 5 = 7.5 mA.
6. (c)
7. (a) I
m
 = =  = 24.75 mA
I
dc
 = =  = 7.87 mA
I
rms
 =  = = 12.37 mA
P
dc
  = I
dc
? 2
 × R
L
  = (7.87 × 10
–3
)
2
 × 10
3
 = 61.9 mW
P
ac
 = I
rms
 
2
(R
f
 + R
L
) = (12.37 × 10
–3
)
2
 × (10 + 1000)
= 154.54 mW
Rectifier efficiency
? =  × 100 =  × 100 = 40.05%
8. (b) D
2
 is forward biased whereas D
1
 is reversed biased.
So effective resistance of the circuit
R = 4 + 2 = 6?
.
9. (b) It is a p-n-p transistor with R as base.
10. (c) (W + X) · (W + Y) = W + (X · Y)
11. (d) In pure semiconductor electron-hole pair = 7 × 10
15
/m
3
n
initial 
= n
h
 + n
e
 = 14 × 10
15
 after doping donor Impurity
N
D
 =  = 5 × 10
21 
and  n
e
 =  = 2.5 × 10
21
So, n
final 
= n
h
 + n
e
? n
final
 ˜ n
e
 ˜ 2.5 × 10
21
 ( Q n
e
 >> n
h
)
Factor = 
=  ˜ = 1.8 × 10
5
12. (d) Voltage gain G = ß 
? G = 25 ...(i)
Transconductance g
m
 = 
? R
in
 =  = 
Putting this value of R
in
 in eqn. (i)
G = 25  × 0.03 ...(ii)
? G’ = 20  × 0.02 ...(iii)
From eqs. (ii) and (iii)
Voltage gain of new transistor G’ =  G
13. (a) Positive terminal is at higher potential (–5V) and negative terminal
is at lower potential –10 V.
14. (d) Energy band gap range is given by,
For visible region ? = (4 × 10
–7
 ~ 7 × 10
–7
)m
= 
= 
E
g
 = 1.75 eV
15. (d)
The output voltage, across the load R
C
V
0
 = I
C
 R
C
 = 2
The collector current
Current gain (ß)
= 
Input voltage (V
i
)
V
i
 = R
B
 I
B
 = 1 × 10
3
 × 10
–5
 = 10
–2
 Volt
V
i
 = 10 mV
16. (d)
The truth table for the above logic gate is :
This truth table follows the boolean algebra  C = A + B which is for OR
gate
17. (c) A crystal structure is composed of a unit cell, a set of atoms
arranged in a particular way; which is periodically repeated in
three dimensions on a lattice. The spacing between unit cells in
various directions is called its lattice parameters or constants.
Increasing these lattice constants will increase or widen the band-
gap (E
g
), which means more energy would be required by electrons
to reach the conduction band from the valence band. Automatically
E
c
 and E
v
 decreases.
18. (b) I = nA ev
d
 or I ? nv
d
?   or 
19. (b)