Machine Instructions & Addressing Modes Short notes | Digital Circuits - Electronics and Communication Engineering (ECE) PDF Download

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Mac hine Instructions and A ddressing Mo des
Mac hine instructions and addressing mo des are fundamen tal concepts in computer arc hitecture, defin-
ing ho w a pro cessor executes op erations and accesses data. Mac hine instructions sp ecify the tasks a CPU
p erforms, while addressing mo des determine ho w op erands are lo cated in memory or registers, impacting
program e?iciency and flexibilit y .
1. In tro duction to Mac hine Instructions
Mac hine instructions are binary commands executed b y a CPU to p erform op erations suc h as arithmetic,
logic, data transfer, or con trol flo w. Eac h instruction consists of an op co de (op eration co de) sp ecifying
the task and one or more op erands indicating the data or addresses in v olv ed. Instructions are pro cessor-
sp ecific and form the basis of mac hine language programs.
2. Comp onen ts of a Mac hine Instruction
A t ypical mac hine instruction includes:
• Op co de : Iden tifies the op eration (e.g., ADD, MO V, JMP).
• Op erands : Sp ecify data, registers, or memory addresses in v olv ed in the op eration.
• Instruction Length: Fixed or v ariable, dep ending on the arc hitecture (e.g., 32 bits in RISC,
v ariable in CISC).
F or example, in a 32-bit instruction for an ADD op eration:
[Op co de: 8 bits][Destination Register: 5 bits][Source Register 1: 5 bits][Source Register 2: 5 bits][Un used: 9 bits]
3. T yp es of Mac hine Instructions
Mac hine instructions are categorized based on their function:
• Arithmetic Instructions : P erform op erations lik e ADD, SUB, MUL, DIV.
• Logical Instructions : Execute bit wise op erations (AND, OR, X OR, NOT).
• Data T ransfer Instructions : Mo v e data b et w een registers, memory , or I/O devices (e.g., MO V,
LO AD, STORE).
• Con trol Instructions : Alter program flo w (e.g., JMP , CALL, RET, BRANCH).
• Shift/Rotate Instructions : Shift or rotate bits in a register (e.g., SHL, R OR).
• Input/Output Instructions : In terface with p eripherals (e.g., IN, OUT).
4. Instruction F ormats
Instruction formats v ary b y arc hitecture:
• RISC (Reduced Instruction Set Computing) : Fixed-length instructions (e.g., 32 bits) with
simple formats for fast deco ding.
• CISC (Complex Instruction Set Computing) : V ariable-length instructions supp orting com-
plex op erations.
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Mac hine Instructions and A ddressing Mo des
Mac hine instructions and addressing mo des are fundamen tal concepts in computer arc hitecture, defin-
ing ho w a pro cessor executes op erations and accesses data. Mac hine instructions sp ecify the tasks a CPU
p erforms, while addressing mo des determine ho w op erands are lo cated in memory or registers, impacting
program e?iciency and flexibilit y .
1. In tro duction to Mac hine Instructions
Mac hine instructions are binary commands executed b y a CPU to p erform op erations suc h as arithmetic,
logic, data transfer, or con trol flo w. Eac h instruction consists of an op co de (op eration co de) sp ecifying
the task and one or more op erands indicating the data or addresses in v olv ed. Instructions are pro cessor-
sp ecific and form the basis of mac hine language programs.
2. Comp onen ts of a Mac hine Instruction
A t ypical mac hine instruction includes:
• Op co de : Iden tifies the op eration (e.g., ADD, MO V, JMP).
• Op erands : Sp ecify data, registers, or memory addresses in v olv ed in the op eration.
• Instruction Length: Fixed or v ariable, dep ending on the arc hitecture (e.g., 32 bits in RISC,
v ariable in CISC).
F or example, in a 32-bit instruction for an ADD op eration:
[Op co de: 8 bits][Destination Register: 5 bits][Source Register 1: 5 bits][Source Register 2: 5 bits][Un used: 9 bits]
3. T yp es of Mac hine Instructions
Mac hine instructions are categorized based on their function:
• Arithmetic Instructions : P erform op erations lik e ADD, SUB, MUL, DIV.
• Logical Instructions : Execute bit wise op erations (AND, OR, X OR, NOT).
• Data T ransfer Instructions : Mo v e data b et w een registers, memory , or I/O devices (e.g., MO V,
LO AD, STORE).
• Con trol Instructions : Alter program flo w (e.g., JMP , CALL, RET, BRANCH).
• Shift/Rotate Instructions : Shift or rotate bits in a register (e.g., SHL, R OR).
• Input/Output Instructions : In terface with p eripherals (e.g., IN, OUT).
4. Instruction F ormats
Instruction formats v ary b y arc hitecture:
• RISC (Reduced Instruction Set Computing) : Fixed-length instructions (e.g., 32 bits) with
simple formats for fast deco ding.
• CISC (Complex Instruction Set Computing) : V ariable-length instructions supp orting com-
plex op erations.
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Common formats include:
• Register-Register: Op erands in registers (e.g., ADD R1, R2, R3).
• Register-Memory: One op erand in memory (e.g., ADD R1, [M]).
• Immediate: One op erand is a constan t (e.g., ADD R1, 5).
5. A d dressing Mo des
A d dressing mo des sp ecify ho w op erands are accessed in an instruction. Common mo des include:
• Immediate Mo de : The op erand is a constan t em b edded in the instruction.
Example: MO V R1, 10 ( R1? 10)
• Register Mo de : The op erand is in a CPU register.
Example: ADD R1, R2 ( R1? R1+ R2)
• Direct (Absolute) Mo de : The op erand’s memory address is sp ecified directly .
Example: LO AD R1, [1000] ( R1? Memory[1000])
• Indirect Mo de : The instruction con tains the address of the memory lo cation holding the op erand’s
address.
Example: LO AD R1, [R2] ( R1? Memory[Memory[R2]])
• Indexed Mo de : The op erand’s address is calculated as a base address plus an offset (often in a
register).
Example: LO AD R1, [R2 + 4] ( R1? Memory[R2 + 4])
• Base-Register Mo de : Similar to indexed, using a base register plus a displacemen t.
Example: LO AD R1, [R3 + 100] ( R1? Memory[R3 + 100])
• PC-Relativ e Mo de : The op erand’s address is relativ e to the program coun ter (PC), used in
branc hing.
Example: JMP +8 ( PC? PC+8)
• Stac k Mo de : Op erands are accessed from a stac k (e.g., PUSH, POP).
6. Applications
Mac hine instructions and addressing mo des are used in:
• Pro cessor Design : Defining instruction sets for CPUs (e.g., ARM, x86).
• Assem bly Programming : W riting lo w-lev el co de for p erformance-critical applications.
• Compilers : T ranslating high-lev el co de in to mac hine instructions with optimal addressing mo des.
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Page 3


Mac hine Instructions and A ddressing Mo des
Mac hine instructions and addressing mo des are fundamen tal concepts in computer arc hitecture, defin-
ing ho w a pro cessor executes op erations and accesses data. Mac hine instructions sp ecify the tasks a CPU
p erforms, while addressing mo des determine ho w op erands are lo cated in memory or registers, impacting
program e?iciency and flexibilit y .
1. In tro duction to Mac hine Instructions
Mac hine instructions are binary commands executed b y a CPU to p erform op erations suc h as arithmetic,
logic, data transfer, or con trol flo w. Eac h instruction consists of an op co de (op eration co de) sp ecifying
the task and one or more op erands indicating the data or addresses in v olv ed. Instructions are pro cessor-
sp ecific and form the basis of mac hine language programs.
2. Comp onen ts of a Mac hine Instruction
A t ypical mac hine instruction includes:
• Op co de : Iden tifies the op eration (e.g., ADD, MO V, JMP).
• Op erands : Sp ecify data, registers, or memory addresses in v olv ed in the op eration.
• Instruction Length: Fixed or v ariable, dep ending on the arc hitecture (e.g., 32 bits in RISC,
v ariable in CISC).
F or example, in a 32-bit instruction for an ADD op eration:
[Op co de: 8 bits][Destination Register: 5 bits][Source Register 1: 5 bits][Source Register 2: 5 bits][Un used: 9 bits]
3. T yp es of Mac hine Instructions
Mac hine instructions are categorized based on their function:
• Arithmetic Instructions : P erform op erations lik e ADD, SUB, MUL, DIV.
• Logical Instructions : Execute bit wise op erations (AND, OR, X OR, NOT).
• Data T ransfer Instructions : Mo v e data b et w een registers, memory , or I/O devices (e.g., MO V,
LO AD, STORE).
• Con trol Instructions : Alter program flo w (e.g., JMP , CALL, RET, BRANCH).
• Shift/Rotate Instructions : Shift or rotate bits in a register (e.g., SHL, R OR).
• Input/Output Instructions : In terface with p eripherals (e.g., IN, OUT).
4. Instruction F ormats
Instruction formats v ary b y arc hitecture:
• RISC (Reduced Instruction Set Computing) : Fixed-length instructions (e.g., 32 bits) with
simple formats for fast deco ding.
• CISC (Complex Instruction Set Computing) : V ariable-length instructions supp orting com-
plex op erations.
1
Common formats include:
• Register-Register: Op erands in registers (e.g., ADD R1, R2, R3).
• Register-Memory: One op erand in memory (e.g., ADD R1, [M]).
• Immediate: One op erand is a constan t (e.g., ADD R1, 5).
5. A d dressing Mo des
A d dressing mo des sp ecify ho w op erands are accessed in an instruction. Common mo des include:
• Immediate Mo de : The op erand is a constan t em b edded in the instruction.
Example: MO V R1, 10 ( R1? 10)
• Register Mo de : The op erand is in a CPU register.
Example: ADD R1, R2 ( R1? R1+ R2)
• Direct (Absolute) Mo de : The op erand’s memory address is sp ecified directly .
Example: LO AD R1, [1000] ( R1? Memory[1000])
• Indirect Mo de : The instruction con tains the address of the memory lo cation holding the op erand’s
address.
Example: LO AD R1, [R2] ( R1? Memory[Memory[R2]])
• Indexed Mo de : The op erand’s address is calculated as a base address plus an offset (often in a
register).
Example: LO AD R1, [R2 + 4] ( R1? Memory[R2 + 4])
• Base-Register Mo de : Similar to indexed, using a base register plus a displacemen t.
Example: LO AD R1, [R3 + 100] ( R1? Memory[R3 + 100])
• PC-Relativ e Mo de : The op erand’s address is relativ e to the program coun ter (PC), used in
branc hing.
Example: JMP +8 ( PC? PC+8)
• Stac k Mo de : Op erands are accessed from a stac k (e.g., PUSH, POP).
6. Applications
Mac hine instructions and addressing mo des are used in:
• Pro cessor Design : Defining instruction sets for CPUs (e.g., ARM, x86).
• Assem bly Programming : W riting lo w-lev el co de for p erformance-critical applications.
• Compilers : T ranslating high-lev el co de in to mac hine instructions with optimal addressing mo des.
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• Em b edded Systems : Implemen ting con trol logic in micro con trollers.
• Op erating Systems : Managing hardw are resources via privileged instructions.
7. Practical Considerations
• Instruction Cycle Time : Dep ends on instruction complexit y and addressing mo de (e.g., imme-
diate is faster than indirect).
• Memory A ccess : Indirect and indexed mo des require additional memory accesses, increasing
latency .
• P o w er Consumption : Complex addressing mo des in CISC arc hitectures consume more p o w er
than RISC’s simpler mo des.
• Program Size : Immediate and direct mo des ma y increase instruction length, while register mo des
reduce it.
• Pip eline E?iciency : RISC’s uniform instruction formats impro v e pip elining compared to CISC’s
v ariable lengths.
8. Examples in Digital Systems
• ARM Instruction : ADD R0, R1, 5 uses im mediate mo de to add 5 to R1 and store in R0.
• x86 Instruction : MOV EAX, [EBX + 4] uses indexed mo de to load data from mem ory .
9. Conclusion
Mac hine instructions and addressing mo des are critical for defining ho w a pro cessor in teracts with data
and executes programs. Instructions sp ecify op erations, while addressing mo des p ro vide flexible w a ys
to access op erands, balancing sp eed, memory usage, and complexit y . Understanding these concepts is
essen tial for designing e?icien t pro cessors and writing optimized lo w-lev el co de.
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