Semiconductor diodes are typically fabricated from silicon (Si) or germanium (Ge) crystals doped with specific impurities to create p-type or n-type regions. P-type material is formed by adding acceptor impurities (e.g., boron), while n-type material is created with donor impurities (e.g., phosphorus) during crystal growth. These crystals are sliced into thin wafers, which serve as the substrate for semiconductor devices.
P-n junctions are formed using several techniques:
In a p-n junction, donor ions in the n-type region are represented by a positive charge (+), as they become positive ions after donating an electron. Acceptor ions in the p-type region are denoted by a negative charge (−), as they become negative ions after accepting an electron.
Initially, the p-type region (left of the junction) contains primarily holes, and the n-type region (right of the junction) contains primarily electrons. Due to the concentration gradient across the junction, holes diffuse from the p-side to the n-side, and electrons diffuse from the n-side to the p-side. This diffusion leaves behind unneutralized ions—positive donor ions on the n-side and negative acceptor ions on the p-side—forming a depletion region (also called the space-charge or transition region) near the junction. This region, depleted of mobile charge carriers, typically has a thickness of approximately 1 µm (10⁻⁶ m).
The diffusion of carriers creates an electric field across the depletion region, directed from the n-side to the p-side. This field opposes further diffusion, establishing equilibrium when the field strength balances the diffusion tendency. The resulting potential barrier, or contact potential (V₀), is typically a few tenths of a volt and prevents further net carrier movement.
The charge distribution, electric field, and potential across the junction are illustrated as follows:
The width of the depletion layer and the height of the potential barrier depend on the doping concentrations of the p- and n-type regions. Higher doping reduces the depletion width and increases the barrier height.
At equilibrium, no net current flows across the p-n junction. The diffusion current (due to carrier concentration gradients) is exactly balanced by the drift current (due to the electric field). For holes and electrons, this balance is expressed as:
Thus, the drift and diffusion current densities components cancel each other for both carrier types.
The potential distribution in the junction satisfies the Poisson equation inside the depletion region:
where is the charge density and is the permittivity of the semiconductor.
Outside the depletion region, where the charge density is zero, the potential satisfies the Laplace equation:
A schematic diagram of a p - n junction, including the charge density, electric field intensity, and potential - energy barriers at the junctions, (not drawn to scale.)
Diode permits the easy flow of current in one direction but restrains the flow in die opposite direction.
The applied voltage V on the n-side is positive and is negative on the p-side.
The applied bias V and the barrier potential V# are in the same direction making the effective junction potential as V + Vo. As a result, the junction width will increase.
The higher junction potential would restrict the flow of majority carriers to a much greater extent.
However, such a field will favour the flow of minority carriers (as they have opposite charges).
So, the reverse bias current will be due to the minority carriers only.
Since, the number of minority carriers is very small as compared to the majority carriers, the reverse bias current is small (≈ μA).
This energy E0 represents the potential energy of the electrons at junction.
Band diagram for a p-n junction under open-circuit conditions. This sketch corresponds to fig (le) and represents potential energy for electrons. The width of the forbidden gap is Eg in electron volts.From figure,
EF - Evp - 1/2 EG - E1 and ECn - EF - 1/2 EG - E2 EG = forbidden energy gap
By adding the above equations
E0 = E1 + E2 = EG - (ECn - EF) - (EF - EVp)
EG = kT In |(NCNv) / ni2] ....(1)
Ecn - EF = kT ln (NC/ND) ....(2) ∴ KT = 26 meV
EF - Evp = kT ln (Nv/NA) ....(3)
The E’s are expressed in electron volts and-k has the dimensions of electron volts per degree Kelvin. The Contact difference in potential V0 is expressed in volts and is numerically equal to E0 and it is depends only upon the equilibrium concentrations, and not at all upon the charge density in the transition region(space charge region).
Other expressions for E0 are....(4)
Rewriting the above equation (4) in another form
pp0 = pn0 ev0/vT
nn0 = np0 ev0/vT ....(5)
The hole and electron-current components vs, distance in a p-n junction diode. The space-charge region at the junction is assumed to be negligibly email
Pn(x) = Pno + Pn(0)e-x/Lp ....(6)
Defining the several components of hole concentration in the n side of a forward - biased diode.
Where the parameter Lp is called the diffusion length for holes in the n material.
And the injected or excess concentration at x = 0 is
Pn(0) = Pn(0) - Pno
The diffusion hole current in the n-side is given by
junction
....(7)
Taking the derivative of equation (6) and substituting in equation (7) we obtain
.... (8)
This equation verifies that the hole current decreases exponentially with distance.
Where q = charge of an electron
For a p-n junction, the current I is related to the voltage V by the equation
I = I0(ev/ηvT -1) ....(13)
η ≅ 1 for Ge
η ≅ 2 for Si
VT = T/11,600 = 26 m V at T = 300°K.
At room temperature,
(a) When the voltage V is positive and several times VT , the unity in the parenthesis of equation (13) may be neglected, i.e., ev/ηvT >>1,
∴ l = l0 ev/ηv T
Accordingly except for a small range in the neighborhood of the origin, the current increases exponentially with voltage.
(b) When the diode is reverse-biased and |V| is several times VT, I ≈ - I0. The “reverse
current” is therefore constant, independent of the applied reverse bias. Consequently, I0 is referred to as the “reverse saturation current”
At a reverse biasing voltage Vz, the diode characteristic exhibits an abrupt and marked departure from (13). At this critical voltage a large reverse current flows, and the diode is said to be in the “break down region”.
The volt-ampere characteristic for a germanium diode
The Cutin Voltage, Offset, break-point, or threshold voltage (Vy):
Below Vy the current is very small (say, less than 1 per cent of max. rated voltage).
Beyond Vy the current rises very rapidly. Vy = 0.2 V for Ge, 0.6 V for Si.
The reverse saturation current 10 in a Ge is normally larger by a factor of about 1000 than the 10 in a silicon diode of comparable ratings. Since n = 2 for small currents in Si, the 1 increases as eV/2VT only at higher voltages.
The resistance R, cutin voltage Vy, power dissipation and noise margin of Germanium is less— than the silicon. But Germanium is not used in switching characteristics.
The temperature dependence of p-n diode characteristics:
The dependence of 10 on temperature T is given approximately by
I0 = kTm e-v Go/ηvT
Where k is a constant and qVGO (q is the magnitude of the electron charge) is the forbidden gap energy in Joules:
For Ge : n = 1 m = 2 VGO = 0.785V
For Si: n = 2 m = 1.5 VGO = 1.21V
Taking the derivative of the logarithm of above equation, we find
At room temperature, d(lnl0)/dT = 0.08 /°C for Silicon and 0.11 / °C for Germanium.
The 10 increases approximately 7 percent / °C for both Si and Ge. Since (1.07)10 ≈ 2.0, we conclude that the “reverse saturation current(Io)” approximately doubles for every 10°C rise in temperature.
Consider a diode operating at room temperature (300°K) and just beyond the Vy.
Then we find,
Since these data are based on “average characteristics”, it might be well for conservative design to assume a value of
dV / dT = -2.5 mV/°C ....(14)
for either Ge or Si at room temperature.
For Germanium, an increase in temperature from room temperature (25°C) to 90°C increases the 10 to hundreds of microamperes, although in Silicon at 100°C the 10 has increased only to some tenths of a micro ampere.
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