Bipolar Junction Transistors: Assignment | Solid State Physics, Devices & Electronics PDF Download

Q.1. Consider the circuits shown in figures (a) and (b) below
If the transistors in Figures (a) and (b) have current gain (β_dc) of 100 and 10 respectively, then check whether they operate in active region, saturation region or cutoff region. 

In both case input section is F.B.
For figure (a)
Thus V_CB = V_C - V_B = (10-2x10)-0.7V = -ve ⇒ Output section is F.B.
Since both sections are F.B. So it is in saturation region.
For figure (b)
Thus V_CB=V_C-V_B = (4-4.3x1)-0.7= -ve
⇒ Since both sections are F.B. So it is in saturation region.

Q.2. For the network shown in figure, determine r_e, Z_i, Z_o, A_v and A_i. (use r_e = 26mV/I_E)
If (a) r_o = ∞
(b) r₀ = 50 kΩ

DC Analysis:  

AC Analysis:  

Q.3. Consider the following circuit in which the current gain β_dc of the transistor is 100 and V_BE = 0.7V.
Find
(a) I_B 
(b) I_C 
(c) V_CE 
(d) V_C, V_B and V_E 
(e) I_C.sat

Q.4. For the network shown in figure, determine r_e, Z_i, Z_o, A_v and A_i. (use r_e = 26mV/IE)

DC Analysis:  

AC Analysis:  
R_E is “shorted out” by C_E for the ac analysis. Therefore

Q.5. Consider the following circuit in which the current gain β_dc of the transistor is 100, V_BE = 0.7V. Find

(a) I_B 
(b) I_C 
(c) V_CE 
(d) V_C, V_B and V_E 
(e) I_C.sat 

Q.6. For the network shown in figure, determine r_e, Z_i, Z_o, A_v and A_i. (use r_e = 26mV/I_E)
If (a) r_o = ∞
(b) r_o = 50kΩ

DC Analysis:  
βR_E = 90 x 1.5 = 135kΩ and 10R₂ = 10 x 8.2 = 82kΩ
Thus βR_E >> 10R₂ (Use approximate meathod)


AC Analysis:  
(a) r_o = ∞

Q.7. For the transistor circuit shown below, evaluate V_E, R_B and R_C, given I_C = 1mA, β = 80, V_CE = 3.8 V, V_BE = 0.7 V and V_CC = 10V use the approximation I_C ≈ I_E.

Applying KVL to input section,


Writing Kirchhoff’s voltage law for the indicated loop in the clockwise direction will result in - I_ER_E - V_CE - I_CR_C + V_CC = 0

Q.8. For the network shown in figure, determine r_e, Z_i, Z_o, A_v and A_i. (use r_e = 26mV/I_E)

DC Analysis:  

AC Analysis:  

Q.9. For the transistor shown in the figure, the dc current gain β_dc = 50 and V_BE = 0.7. The switch S is initially open. 

(a) Calculate the voltage at point A. If the switch S is now closed, what would be the voltage at point A?      
(b) Draw the dc load line and find the Q-point of the circuit with the switch S remaining closed.  

(a) When switch S is open  

When switch S is closed, draw Thevenin’s equivalent circuit

Applying KVL to input section,


(b) Writing Kirchhoff’s voltage law for the indicated loop in the clockwise direction will result in - I_ER_E - V_CE - I_CR_C + V_CC = 0

Thus Q -point is (I_C, V_CE) (5.0 mA,1.2 V).

Q.10. For the network shown in figure, determine r_e, Z_i, Z_o, A_v and A_i. (use r_e = 26mV/I_E)

DC Analysis:  

AC Analysis:  
Z_i = (R₁||R₂) || Z_b = (R₁ || R₂) || βR_E = (90kΩ||10kΩ) || (210) (0.68kΩ) = 8.47 kΩ
Z_o = R_C = 2.2 kΩ

Q.11. For the transistor circuit shown in the figure β_dc = 100 and 0.7 V_BE = V. Determine the base current I_B, the collector-emitter voltage V_CE, the emitter voltage V_E, the base voltage V_B and the saturation current I_Csat.

Drawing Equivalent circuit for input section
Applying KVL to input section, -20 + 450 x I_B + 0.7 + 1.0 x I_E = 0
⇒ -20 + 450 x I_B + 0.7 + 1.0 x βI_B = 0
∵ I_E ≈ βI_B

⇒ V_B = V_BE + I_ER_E = 0.7 + 3.5 = 4.2V
Writing Kirchhoff’s voltage law for the indicated loop in the clockwise direction will result in - I_ER_E - V_CE - I_CR_C + V_CC = 0

Q.12. For the network shown in figure, determine r_e, Z_i, Z_o, and A_v. (use r_e = 26mV/I_E)

It’s a common collector configuration.
DC Analysis:  

AC Analysis:  
 

Q.13. Determine the dc level of I_B and V_C for the network shown in figure below.

In DC equivalent, capacitor is open circuited.

Q.14. Determine the dc level of V_C and V_B for the network shown in figure below.

In DC equivalent, capacitor is open circuited. Let’s draw Thevenin’s equivalent circuit for input section.
 and R_TH = 8.2k||2.2k = 1.73k
11.53 + I_B x 1.73 + 0.7 + βI_B x 1.8 - 20 = 0
⇒ I_B = 35.39μA

V_B = -V_TH - I_BR_TH = -11.53 - 35.39μA x 1.73k = -11.59V

Q.15. Determine the dc level of V_CE and I_E for the network shown in figure below.

Applying KVL to input section
I_B x 240 + 0.7 + 90 x I_B x 2 - 20 = 0 ⇒ I_B = 45.73μA

Applying KVL to output section

Q.16. Given that determine  R₁ and R_C for the network shown in figure below.