DC Imperfections in Operational Amplifiers - GATE EE Analog and Digital

Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. What is (approximately) the peak sine-wave input signal that can be applied without output clipping?

(Q2 & Q.3) Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. If the effect of V_Os(input offset voltage) is nulled at room temperature (25₀C), how large an input can one now apply if:
Q. The circuit is to operate at a constant temperature?

The circuit is to operate at a temperature in the range 0°C to 75°C and the temperature coefficient of V_OS is 10 μV/°C?

One of the DC imperfections of the amplifiers are dc offset voltage which is

For the amplifier shown determine the value of the bias current (I_b) and input offset current (I_o) respectively.

Consider the circuit shown below which reduces the impact of the input bias current. If I_B1 = I_B2 = Input bias current, then determine the value of R₃ so that the output voltage (v₀) is not impacted by the input bias current.

Consider an inverting amplifier circuit designed using an op amp and two resistors, R₁ = 10 kΩ and R₂ = 1 MΩ. If the op amp is specified to have an input bias current of 100 nA and an input offset current of 10 nA, find the output dc offset voltage resulting.

(Q.8-Q.10) Consider a Miller integrator with a time constant of 1ms and an input resistance of 10 kΩ. Let the op amp have VOS (offset voltage) = 2 mV and output saturation voltages of ±12 V.​

Q. Assuming that when the power supply is turned on the capacitor voltage is zero, how long does it take for the amplifier to saturate?

Select the largest possible value for a feedback resistor RF so that at least ±10 V of output signal swing remains available.

What is the corner frequency of the resulting STC network?