Test: VLSI Design - Electrical Engineering (EE) MCQ

Small scale integration has one or more logic gate. Further improved technology is medium scale integration which consists of hundred logic gates. Large scale integration has thousand logic gates.

As photolithography comes closer to fundamental law of optics, achieving high accuracy in doping concentration becomes difficult, which leads to error due to variation.

Designers must simulate multiple fabrication process or use system level technique for dealing with effects of variation.

As the die size shrinks due to scaling, the number of die per wafer increases and the complexity of making the photomasks increases rapidly.

SoC that is system on a chip architecture is used to design the very high level integrated circuit.

The order of the design flow of VLSI circuit is market requirement, architecture design, logic design, HDL coding and then verification.

First in first out (FIFO) technique and finite state machine technique is used in the logic design of the VLSI circuits.

Transistor-transistor logic offers higher integration density and it became the first integrated circuit revolution.

 Functional design defines the major functional units of the system, interconnections, physical and electrical specifications.

Problem statement is a high level representation of the system. Performance, functionality and physical dimensions are considered here.