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Electronics and Communication Engineering (ECE) Exam  >  Electronics and Communication Engineering (ECE) Tests  >  Test: Sinusoidal Steady-State Analysis - 1 - Electronics and Communication Engineering (ECE) MCQ

Test: Sinusoidal Steady-State Analysis - 1 - Electronics and Communication Engineering (ECE) MCQ


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10 Questions MCQ Test - Test: Sinusoidal Steady-State Analysis - 1

Test: Sinusoidal Steady-State Analysis - 1 for Electronics and Communication Engineering (ECE) 2024 is part of Electronics and Communication Engineering (ECE) preparation. The Test: Sinusoidal Steady-State Analysis - 1 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The Test: Sinusoidal Steady-State Analysis - 1 MCQs are made for Electronics and Communication Engineering (ECE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Sinusoidal Steady-State Analysis - 1 below.
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Test: Sinusoidal Steady-State Analysis - 1 - Question 1
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The phasor diagram shown in figure below is for a two-element series circuit having

Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 1

It is clear that i leads v by 53.2° (< 90°).
Hence the two series elements must be R and C.
∴ tan θ = tan 53.3°
tan 45° < tan 53.3° < tan 60° or,  
 1 < tan 53.3° <1.732
Hence, tan 53.3° = 1.3367

Test: Sinusoidal Steady-State Analysis - 1 - Question 2
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 For the circuit shown below, the voltage across the 3 Ω resistor V3 is

Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 2

Using voltage division rule, we have

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Test: Sinusoidal Steady-State Analysis - 1 - Question 3
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A part of a circuit shown below consists of a resistor, a capacitor and an inductor. At steady state, iR(t) = 10 sin t and vL{t) = 5 cost. The rms value of the current through the capacitor is

Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 3

Using KCL at the given node, 

Test: Sinusoidal Steady-State Analysis - 1 - Question 4
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 In the circuit shown below, currents I and I1 are respectively
Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 4

From given figure

Using phasor diagram shown below, the currents I and I1 are respectively

Test: Sinusoidal Steady-State Analysis - 1 - Question 5
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What should be the value of C for the circuit shown below such that the input power factor is unity for any frequency f of the source?
Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 5

The input impedance Z of given circuit is 

For p.f. to be unity,

Test: Sinusoidal Steady-State Analysis - 1 - Question 6
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 In a series R-L circuit, the current and voltages are given by
i = cos (314t-20°) , v = 10 cos ( 314 t + 10°). The values of R and L are respectively
Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 6

Here, i lags v by 30°

also

Test: Sinusoidal Steady-State Analysis - 1 - Question 7
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A series R-L circuit has resistance and reactance of 15 Ω and 10 Ω respectively. What should be the value of capacitor which when connected across the series combination in parallel, the system attains unity p.f.? (use f= 50 Hz)
Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 7

The situation is shown in figure below with it's phasor diagram.

For unity p.f. operation,


 

Test: Sinusoidal Steady-State Analysis - 1 - Question 8
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The input p.f. of the circuit shown below is
Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 8

or, Zin = 2.828∠-45°Ω
Hence, input p.f. = cos45° = 0.707 (lead)

Test: Sinusoidal Steady-State Analysis - 1 - Question 9
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The input admittance of the circuit shown below is
Detailed Solution for Test: Sinusoidal Steady-State Analysis - 1 - Question 9

Hence

Test: Sinusoidal Steady-State Analysis - 1 - Question 10
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 The driving point impedance

does not represents a passive one port network because
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