Test: Combinational Logic Circuits - 2 - Electronics and Communication Engineering (ECE) MCQ

When a MUX is used to implement a logic function, the logic variables are applied to the MUX's select or control input.
For an example, if we want to implement a NOT gate using a 2 x 1 MUX, then the circuit will be represented as shown below:

Hence, statement-1 is not correct.

Statement-2 is correct because the internal circuit for a DEMUX (data distributor) and a decoder are basically same.

Decoder is a circuit which converts the digital signal into analog signal. Its input will be in digital form while the output will be a continuous sine wave or analog wave.
Encoders are combinational logic circuits and they are exactly opposite of decoders. They accept one or more inputs and generate a multi bit output code. Encoders perform exactly reverse operation than decoders. i.e analog to digital.
Multiplexer is a data selector which takes several inputs and gives a single output.In multiplexer we have 2n input lines and 1 output lines where n is the number of selection lines.
Demultiplexer is a data distributor which takes a single input and gives several outputs.In demultiplexer we have 1 input and 2n output lines where n is the selection line.

Given function,

 has three variables. Hence, it can be implemented using a multiplexer ( 4 x 1 M U X) with two select inputs and four data inputs.
The implementation table is shown below:

Now, the given three variable functions can be implemented using 4-to-1 multiplexer as shown below:

Hence, for implementation of given function we require one 4 x 1 MUX and a NOT gate

The truth table for half adder is shown below

Here, sum output   and carry output is C= XY

No. of input lines = 2^m (where, m = No. of select/ control inputs) or, 32 = 2^m or m=5.

• Serial adders are used where circuit minimization is more important than speed because they require one clock pulse for each pair of bits added and hence slower than parallel adders. Thus, statements 2 and 4 are not correct.
• Statements 1 and 3 are correct.

• The multiplexer can be viewed as a function generator because we can easily set or change the logic function it implements.
• The multiplexer acts like a digitally controlled multi-position switch because the digital code applied to the SELECT inputs determine which data inputs will be switched to the output.

Hence, both assertion and reason are correct but reason is not the correct explanation of assertion.

In cases where non-trivial, a multiple-output expressions of the same input variables are required, a decoder could be advantageous than a multiplexer because in such cases, one multiplexer is required for each output, whereas it is likely that only one decoder supported with a few gates would be required.

The speed of operation of the parallel binary adder is limited by the carry propagation delay through all stages. Hence, assertion is not correct.