Test: JK Flip Flop - Electrical Engineering (EE) MCQ

For J-K flip-flop,

Q_n+1 = JQ̅_n + K̅Q_n ----(1)

For the given circuit:

J = X ⊕ Y and K = X

From equation (1);

Q_n+1 = (X ⊕ Y)Q̅_n + X̅Q_n         

= X̅YQ̅_n + X̅Q_n + XY̅Q̅_n 

= X̅Q_n + X̅YQ̅n + XY̅Q̅_n

= X̅ (YQ̅n + Qn) + XY̅Q̅n

= X̅ (Y + Qn) + XY̅Q̅n

Hence, option 2 is correct.

For R-S flip-flop for input 1,1 the output is undefined.

The truth table of J-K -flop-flop is

The output is clearly defined for all combinations of inputs.

Both D type and T type flip-flops have only one input.

In J-K flip flop when both inputs are HIGH, the output toggles i.e. it changes from high to low and low to high periodically when both the inputs are 1.
For an SR flip flop, however, when both the inputs are HIGH, we encounter an invalid state, which is not present for a JK flip flop.
This is explained with the help of the following function table:

​Similarly, for a JK flip flop, the block diagram along with the function table is as shown:

In the given circuit

We have,

J_A = K_A = 1

So next state will be 11 

When the two inputs of a flip flop are at logical 1 and then the input is changed to any other condition, then the output becomes unpredictable and this is called the race around condition.

The race around condition exists in JK flip flop if J = 1, K = 1.

The race around condition is an undesirable condition as the output of the flip flop cannot be predicted at that moment.

The race around condition can be avoided by using Master Slave flip flop 

By using excitation table of JK flip flop.

From the above table,

Characteristic Table of JK flip flop is:

Qn+1 = JQ̅n + K̅Qn

Based on the table we can see the correct input combination is 1 0 and 1 1.

∴ Option A is correct. 

Concept:

JK FF truth table

Q_n = present state

Q_n+1 = next state

Analysis:

Given: initial state cleared so Q_n = 0

J = Q̅

K = 1

So the o/p sequence will be 010101

Concept:

The characteristic equation of a J-K flip flop is given by-

⇒ Q_n+1 = JQ̅_n + K̅Q_n

Calculation:

Let Q_n is the present state and Q_n+1 is the next state of the given X-Y flip-flop.

Solving the above using K-map, we get the characteristic equation of X-Y flip-flop is-

Q_n+1 = Y̅Q̅_n + X̅Q_n

Characteristic equation of a J-K flip flop is given by

Q_n+1 = JQ̅_n + K̅Q_n

Comparing, J = Y̅ and K = X

A J-K flip-flop can be obtained from the clocked S-R flip-flop by augmenting two AND gates.

Ones catching means that the input transitioned to a 1 and back very briefly (unintentionally due to a glitch), but the flip-flop responded and latched it in anyway, i.e., it caught the 1. Similarly for 0’s catching.

The flip flop is sensitive only to the positive or negative edge of the clock pulse. So, the flip-flop toggles whenever the clock is falling/rising at edge. This triggering of flip-flop during the transition state, is known as Edge-triggered flip-flop. Thus, the output curve has a time period twice that of the clock. Frequency is inversely related to time period and hence frequency gets halved.

32/2 = 16:-first flip-flop,
16/2 = 8:- second flip-flop,
8/2 = 4:- third flip-flop,
4/2 = 2:- fourth flip-flop.
Since the output frequency is determined on basis of the 4^th flip-flop.

Concept:

In J-K flip-flop, if both the inputs are same then it behaves like T flip-flop.

A T flip-flop is like a JK flip-flop. These are basically a single input version of JK flip-flops. This modified form of JK flip-flop is obtained by connecting both inputs J and K together. It has only one input along with the clock input.

Additional Information
Truth table of T Flip flop

Concept:

The Truth table of JK flip flop is

From the truth table when J = 1, K = 1 the output is reset, i.e. Qn + 1 = Q̅_n