GATE Exam  >  GATE Tests  >  Test: Combinational Logic Circuits - GATE MCQ

Test: Combinational Logic Circuits - GATE MCQ


Test Description

10 Questions MCQ Test - Test: Combinational Logic Circuits

Test: Combinational Logic Circuits for GATE 2025 is part of GATE preparation. The Test: Combinational Logic Circuits questions and answers have been prepared according to the GATE exam syllabus.The Test: Combinational Logic Circuits MCQs are made for GATE 2025 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Combinational Logic Circuits below.
Solutions of Test: Combinational Logic Circuits questions in English are available as part of our course for GATE & Test: Combinational Logic Circuits solutions in Hindi for GATE course. Download more important topics, notes, lectures and mock test series for GATE Exam by signing up for free. Attempt Test: Combinational Logic Circuits | 10 questions in 30 minutes | Mock test for GATE preparation | Free important questions MCQ to study for GATE Exam | Download free PDF with solutions
Test: Combinational Logic Circuits - Question 1

Which of the following circuit has its output dependent only upon the present input?

Detailed Solution for Test: Combinational Logic Circuits - Question 1

Combinational Logic circuits are circuits for which the present output depends only on the present input, i.e. there is no memory element to store the past output.

A combinational circuit can have ‘n’ number of inputs and ‘m’ number of outputs as shown:

Combinational circuits are:

  • Multiplexer/Demultiplexer
  • Encoder/Decoder
  • Adders
  • Subtractors
  • Code Converters

In a sequential circuit, the output depends on both the present and the past values. The circuit diagram is as shown:

Examples of sequential circuits:

  • Shift Registers
  • Flip flops
  • Counters
Test: Combinational Logic Circuits - Question 2

Construct a 16 × 1 multiplexer using 2 × 1 multiplexer. How many 2 × 1 multiplexer are required to construct?

Detailed Solution for Test: Combinational Logic Circuits - Question 2

To implement 2n × 1 MUX using 2 × 1 MUX, the total number of 2 × 1 MUX required is (2n - 1).

∴ The number of 2 × 1 multiplexer required to implement 16 × 1 MUX will be:

n = 16 - 1 = 15

Or we can follow the below steps to calculate the same:

1st stage = 16/2 = 8

2nd  stage = 8/2 = 4

3rd stage = 4/2 = 2

4th stage = 2/2 = 1

The sum will give the total number of MUX required to implement 16 × 1 multiplexer using 2 × 1, i.e.

n = 8 + 4 + 2 + 1 = 15

Test: Combinational Logic Circuits - Question 3

AND gate EXOR gate combination is ____ 

Detailed Solution for Test: Combinational Logic Circuits - Question 3

A half adder circuit is basically made up of and a AND gate with an XOR gate as shown below.

  • A half adder is also known as XOR gate because XOR is applied to both inputs to produce the sum
  • Half adder can add only two bits (A and B) and has nothing to do with the carry
  • If the input to a half adder has a carry, then it will neglect it and adds only the A and B bits
  • That means the binary addition process is not complete and that's why it is called a half adder

Sum (S) = A⊕B, Carry = A.B

Test: Combinational Logic Circuits - Question 4

In a half adder, the carry output is high if the inputs are:

Detailed Solution for Test: Combinational Logic Circuits - Question 4

The truth table for half adder is given below:

Therefore, the carry is given by AB.

Hence the carry output is high if the both inputs are high i.e. 1,1

Test: Combinational Logic Circuits - Question 5

Which of the following is an example of a combinational logic circuit?

Detailed Solution for Test: Combinational Logic Circuits - Question 5

Solution: An encoder is a combinational logic circuit that converts an active input signal into a binary code corresponding to the input.

Test: Combinational Logic Circuits - Question 6

In half adder, the total number of inputs and outputs are:

Detailed Solution for Test: Combinational Logic Circuits - Question 6

Concept:

A half adder circuit is basically made up of and a AND gate with XOR gate as shown below.

  • A half adder is also known as the XOR gate because XOR is applied to both inputs to produce the sum.
  • Half adder can add only two bits (A and B) and has nothing to do with the carry.
  • Half adder has two inputs (A and B) and two outputs (S and C).
  • If the input to a half adder has a carry, then it will neglect it and adds only the A and B bits.
  • That means the binary addition process is not complete and that's why it is called a half adder.
Test: Combinational Logic Circuits - Question 7

The full adder circuit can be implemented using:

Detailed Solution for Test: Combinational Logic Circuits - Question 7

A full adder uses XOR gates for the sum and AND gates for the carry. It adds three input bits, including the carry-in.

Test: Combinational Logic Circuits - Question 8

For the multiplexer shown below, the number of selection lines is equal to ________?

Detailed Solution for Test: Combinational Logic Circuits - Question 8

Concept:

Multiplexer:

  • It is type of combinational circuit for which the present output depends only on the present input.
  • It is also known as memoryless circuit because there are no memory element to store the past output.
  • A multiplexer is a many to one data selector.
  • It selects one of the many data available at its input depending on the bits of the select lines.
  • For 2n inputs, there are n select lines that determine which input is to be connected to the output.

In the given multiplexer circuit, we have 8 input lines.

∴ 2n = 8

2= 23

By comparing exponents on both sides we get;

n = 3

In conclusion, the total number of select lines is (n) = 3

Test: Combinational Logic Circuits - Question 9

Which logic gate is used in the construction of a half adder?
 

Detailed Solution for Test: Combinational Logic Circuits - Question 9

A half adder is a basic digital circuit used to add two single-bit binary numbers. It consists of two outputs: Sum and Carry.

  • The Sum output is generated by an XOR gate because XOR (exclusive OR) produces a high (1) output when exactly one of the inputs is high. This matches the behavior of binary addition where the sum is 1 when exactly one of the bits is 1.
  • The Carry output is generated by an AND gate, which outputs 1 only when both inputs are 1, representing the carry-over in binary addition.

So, a half adder requires both an XOR gate for the sum and an AND gate for the carry.

Test: Combinational Logic Circuits - Question 10

Which of the following is NOT a characteristic of combinational circuits?

Detailed Solution for Test: Combinational Logic Circuits - Question 10

Combinational circuits do not depend on previous outputs; their output depends only on the present input. Sequential circuits, on the other hand, depend on both present input and past outputs.

Information about Test: Combinational Logic Circuits Page
In this test you can find the Exam questions for Test: Combinational Logic Circuits solved & explained in the simplest way possible. Besides giving Questions and answers for Test: Combinational Logic Circuits, EduRev gives you an ample number of Online tests for practice
Download as PDF