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Test: Logic Gates - Computer Science Engineering (CSE) MCQ


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10 Questions MCQ Test - Test: Logic Gates

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Test: Logic Gates - Question 1

______ is also known as Inverter.

Detailed Solution for Test: Logic Gates - Question 1
  • NOT Gate is also known as Inverter
  • The 7404 is a high-speed CMOS Logic Quad NOT Gate.
  • The 7404 is also known as Hex inverter.
  • The contains Six independent NOT gates in one package. T
  • The NOT gate consists of only one input and one output.
  • A NOT gate is used to output the Boolean inverse of the applied input.
  • Hence the name ‘Digital Inverter’ or ‘Inverting buffer’. The most commonly used NOT gate IC is 7404.
  • The symbol  and truth table of NOT gate and a buffer given as 

Test: Logic Gates - Question 2

Examine these two statements carefully and select the answers to these items using the code given below:

Statement (I): When all inputs of a NAND gate are shorted to get a single input, single output gate, it becomes an inverter.

Statement (II): When all inputs of a NAND gate are at logic ‘0’ level, the output is at logic ‘0’ level.

Detailed Solution for Test: Logic Gates - Question 2

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Test: Logic Gates - Question 3

Identify the logic gate shown in the figure?

Detailed Solution for Test: Logic Gates - Question 3

NOR GATE:

Symbol:


Truth Table:

Output equation:  
Y=A+B
Output is high only when all inputs are low.
It is a universal gate

Test: Logic Gates - Question 4

The output of logic circuit given below represents _______ gate.

Detailed Solution for Test: Logic Gates - Question 4

Q= AB
Output expression Q is equivalent to NAND gate.

Test: Logic Gates - Question 5

The minimum number of 2-input NAND gates required to implement a 2-input XOR gate is

Detailed Solution for Test: Logic Gates - Question 5

The number of 2-input NAND gates required to implement a 2-input XOR gate is 4.

Similarly, the number of 2-input NOR gates required to implement a 2-input XNOR gate is 4.

Test: Logic Gates - Question 6

What will be the fundamental frequency for the following circuit if each inverter delay is 100 nsec?

Detailed Solution for Test: Logic Gates - Question 6

Given, 

n = 3 as there are three gates with feedback

Tpd = 100 nsec
T = 2 × 3 × 10-7
T= 6 × 10-7
Fundamental Frequency is given by f

Test: Logic Gates - Question 7

How many AND and OR gates are required to realise Y = AB + BC + CD?

Detailed Solution for Test: Logic Gates - Question 7

AND GATE:
The AND operation is performed the same as the ordinary multiplication of 1s and 0s.
The output of AND gate becomes 1 only when all the inputs are 1.
Hence AND gate is also called an all or nothing gate.

OR GATE:
The output of the OR gate becomes 1 even if one of its inputs is 1.
Hence OR gate is also called an any or all gate.

Test: Logic Gates - Question 8

The symbol for two - input OR- gate in negative logic is:

Detailed Solution for Test: Logic Gates - Question 8

Let's assume two inputs be A and B.

and the output is Y.

 
 Using De-Morgan's Law:

 Symbols of various logic gates:

1.) OR Gate:

2.) AND Gate:

3.) NOT Gate:

4.) NOR Gate:

5.) NAND Gate:

6.) XOR Gate:

7.) XNOR Gate:

Test: Logic Gates - Question 9

The output Y of the logic circuit given below is:-

Detailed Solution for Test: Logic Gates - Question 9

Test: Logic Gates - Question 10

The Boolean expression AB + AC̅ + BC simplifies to

Detailed Solution for Test: Logic Gates - Question 10

Given Boolean expression is,

F = AB + AC̅ + BC


F = BC + AC̅

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