Computer Science Engineering (CSE) Exam  >  Computer Science Engineering (CSE) Tests  >  Test: Latches - Computer Science Engineering (CSE) MCQ

Test: Latches - Computer Science Engineering (CSE) MCQ


Test Description

10 Questions MCQ Test - Test: Latches

Test: Latches for Computer Science Engineering (CSE) 2024 is part of Computer Science Engineering (CSE) preparation. The Test: Latches questions and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus.The Test: Latches MCQs are made for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Latches below.
Solutions of Test: Latches questions in English are available as part of our course for Computer Science Engineering (CSE) & Test: Latches solutions in Hindi for Computer Science Engineering (CSE) course. Download more important topics, notes, lectures and mock test series for Computer Science Engineering (CSE) Exam by signing up for free. Attempt Test: Latches | 10 questions in 30 minutes | Mock test for Computer Science Engineering (CSE) preparation | Free important questions MCQ to study for Computer Science Engineering (CSE) Exam | Download free PDF with solutions
Test: Latches - Question 1

Which property is NOT considered in latches?

Detailed Solution for Test: Latches - Question 1
  • Latches are level-triggered (outputs can change as soon as the inputs changes)  
  • Flip-Flop is edge-triggered (only changes state when a control signal goes from high to low or low to high).
  • Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal.
  • Level triggering is a type of triggering that allows a circuit to become active when the clock pulse is on a particular level.
Test: Latches - Question 2

Which of the following can be used for debouncing a switch ?

Detailed Solution for Test: Latches - Question 2
  • Switch bounce or contact bounce or even called chatter is a common problem associated with mechanical switches and relays.
  • Switch bouncing is not a major problem when we deal with the power circuits, but it causes problems while we are dealing with the logic and digital circuits.
  •  Hence, to remove the bouncing from the circuit Switch Debouncing Circuit is used.
  • The hardware debouncing technique uses an S-R latch to avoid bounces in the circuit along with the pull-up resistors. 
  • S-R circuit is the most effective of all debouncing approaches
  • The figure below is a simple debouncing circuit that is often used.

SR Latch:

  • In an S-R latch, activation of the S input sets the circuit, while activation of the R input resets the circuit.
  • If both S and R inputs are activated simultaneously, the circuit will be in an invalid condition.


 

Application:

  • Latches are used to keep the conditions of the bits to encode binary numbers.
  • Latches are single-bit storage elements that are widely used in computing as well as data storage.
  • Latches are used in the circuits like power gating & clock as a storage device.
1 Crore+ students have signed up on EduRev. Have you? Download the App
Test: Latches - Question 3

______ is commonly used to interface output devices.

Detailed Solution for Test: Latches - Question 3
  • Latches are memory devices and can store one bit of data for as long as the device is powered.
  • As the name suggests, latches are used to "latch onto" information and hold it in place.
  • Latches are very similar to flip-flops, but are not synchronous devices, and do not operate on clock edges as flip-flops do.
  • The reason for using the latch in an output port is simple, we do not want to lose the result of any operation.
  • So, in order to not lose it, we use a latch, so that it holds the information as long as new information is overwritten onto it.
  • An 8-bit latch can be used to interface the output of a microprocessor to other devices.
  • The 74LS373 octal latch and the 74LS374 octal D flip-flop are popular microprocessor interface chips.

Note: Tristate buffer is commonly used to interface input devices.

Test: Latches - Question 4

When both inputs of SR latches are high, the latch goes ___________

Detailed Solution for Test: Latches - Question 4

When both gates are identical and this is “metastable”, and the device will be in an undefined state for an indefinite period.

Test: Latches - Question 5

When a high is applied to the Set line of an SR latch, then ___________

Detailed Solution for Test: Latches - Question 5

S input of an SR latch is directly connected to the output Q. So when a high is applied Q output goes high and Q’ low.

Test: Latches - Question 6

The first step of the analysis procedure of SR latch is to ___________

Detailed Solution for Test: Latches - Question 6

All flip flops have at least one output labeled Q (i.e. inverted). This is so because the flip flops have inverting gates inside them, hence in order to have both Q and Q complement available, we have atleast one output labelled.

Test: Latches - Question 7

The outputs of SR latch are ___________

Detailed Solution for Test: Latches - Question 7

SR or Set-Reset latch is the simplest type of bistable multivibrator having two stable states. The inputs of SR latch are s and r while outputs are q and q’. It is clear from the diagram:

Test: Latches - Question 8

The full form of SR is ___________

Detailed Solution for Test: Latches - Question 8

The full form of SR is set/reset. It is a type of latch having two stable states.

Test: Latches - Question 9

Two stable states of latches are ___________

Detailed Solution for Test: Latches - Question 9

A latch has two stable states, following the principle of Bistable Multivibrator. There are two stable states of latches and these states are high-output and low-output.

Test: Latches - Question 10

Latch is a device with ___________

Detailed Solution for Test: Latches - Question 10

Explanation: A latch has two stable states, following the principle of Bistable Multivibrator. There are two stable states of latches and these states are high-output and low-output.

Information about Test: Latches Page
In this test you can find the Exam questions for Test: Latches solved & explained in the simplest way possible. Besides giving Questions and answers for Test: Latches, EduRev gives you an ample number of Online tests for practice

Top Courses for Computer Science Engineering (CSE)

Download as PDF

Top Courses for Computer Science Engineering (CSE)