Test: Logic Families - Electronics and Communication Engineering (ECE) MCQ

CMOS gates are commercially available as 4000 series. This technique is most suitable for commercial circuits.

The logic ‘0’ of ECL is represented as 0.9 V and logic ‘1’ is represented as 1.75 V. ECL stands for emitter-coupled logic.

The standard TTL gates are marketed as 74 series. They can operate up to 70⁰C.

In TTL logic, the input transistor has a number of emitter equal to the desired fan-in of the circuit. This is a major advantage.

Transistor-transistor logic is the most widely employed logic family. It is the most popular logic family.

MOS gates do not have high switching speed. They have limited switching capability.

Schottky TTL circuits have reduced propagation delay than normal TTL circuits. The propagation delay of 10ns is very high for some applications.

The propagation delay of TTL circuit is 1 ns. It is a main characteristic of TTL circuit.

The basic function of TTL gate is NAND function. It is the most popular logic family.

Concept: 

Rise time, tr is the time taken by the output to switch from 10% to 90% of the maximum value. Rise time is related to the Propagation delay. Propagation delay in logic gates typically refers to the rise time or fall time i.e. the time taken to change the output state based on a change in the input state. 

Analysis:

• In Emitter-coupled logic (ECL), the transistor never enters into saturation region. Hence, it is the fastest logic family with a propagation delay of around 1-2 ns.
• A typical low-power Schottky TTL gate has a propagation delay of about 10 nanoseconds.
• The propagation delay for the CMOS lies between 20 to 50 ns. 

 Hence,

t_r(PECL) < t_r(MECL) < t_r(TTL) , t_r(CMOS)