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Test: Synchronous & Asynchronous BUS - Computer Science Engineering (CSE) MCQ


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20 Questions MCQ Test - Test: Synchronous & Asynchronous BUS

Test: Synchronous & Asynchronous BUS for Computer Science Engineering (CSE) 2024 is part of Computer Science Engineering (CSE) preparation. The Test: Synchronous & Asynchronous BUS questions and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus.The Test: Synchronous & Asynchronous BUS MCQs are made for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Synchronous & Asynchronous BUS below.
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Test: Synchronous & Asynchronous BUS - Question 1

 The primary function of the BUS is

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 1

Answer: a
Explanation: The BUS is used to allow the passage of commands and data between cpu and devices.

Test: Synchronous & Asynchronous BUS - Question 2

The classification of BUSes into synchronous and asynchronous is based on

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 2

Answer: c
Explanation: The BUS are classified into different types for convenience of use and depending on the device.

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Test: Synchronous & Asynchronous BUS - Question 3

The device which starts data transfer is called

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 3

Answer: d
Explanation: The device which starts the data transfer is called as initiator.

Test: Synchronous & Asynchronous BUS - Question 4

The device which interacts with the initiator is

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 4

Answer: a
Explanation: The device which recieves the commands from the initiator for data transfer.

Test: Synchronous & Asynchronous BUS - Question 5

In synchronous BUS, the devices get the timing signals from

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 5

Answer: b
Explanation: The devices recieve their timing signals from the clock line of the BUS.

Test: Synchronous & Asynchronous BUS - Question 6

 The delays caused in the switching of the timing signals is due to

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 6

Answer: c
Explanation: The time taken for the signal to reach the BUS from the device or the circuit accounts for this delay.

Test: Synchronous & Asynchronous BUS - Question 7

The time for which the data is to be on the BUS is affected by

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 7

Answer: d
Explanation: The time for which the data is held is larger than the time taken for propogation delay and setup time.

Test: Synchronous & Asynchronous BUS - Question 8

The Master strobes the slave at the end of each clock cycle in Synchronous BUS. 

Test: Synchronous & Asynchronous BUS - Question 9

Which is fed into the BUS first by the initiator..??

Test: Synchronous & Asynchronous BUS - Question 10

_____________ signal is used as an acknowledgement signal by the slave in Multiple cycle transfers.

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 10

Answer: b
Explanation: The slave once it recieves the commands and address from the master strobes the ready line indicating to the master that the commands are recieved.

Test: Synchronous & Asynchronous BUS - Question 11

 The master indicates that the address is loaded onto the BUS,by activating _____ signal.

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 11

Answer: a
Explanation: The signal activated by the master in the asynchronous mode of transmission is used to intimate the slave the required data is on the BUS.

Test: Synchronous & Asynchronous BUS - Question 12

The devices with variable speeds are usually connected using asynchronous BUS. 

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 12

Answer: a
Explanation: The devices with variable speeds are connected using asynchronous BUS, as the devices share a master-slave relationship.

Test: Synchronous & Asynchronous BUS - Question 13

The MSYN signal is initiated

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 13

Answer: b
Explanation: This signal is activated by the master to tell the slave that the required commands are on the BUS.

Test: Synchronous & Asynchronous BUS - Question 14

 In IBM’s S360/370 systems _____ lines are used to select the I/O devices.

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 14

Answer: a
Explanation: The signal is used to scan and connect to input or output devices.

Test: Synchronous & Asynchronous BUS - Question 15

The meter in and out lines are used for

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 15

Answer: a
Explanation: The line is used to monitor the devices usage for a process.

Test: Synchronous & Asynchronous BUS - Question 16

MRDC stands for _______

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 16

Answer: b
Explanation: The command is used to initiate a read from memory operation.

Test: Synchronous & Asynchronous BUS - Question 17

The BUS that allows I/O,memory and Processor to coexist is _______

Test: Synchronous & Asynchronous BUS - Question 18

 The transmission on the asynchronous BUS is also called as _____

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 18

Answer: d
Explanation: The asynchronous transmission is termed as Hand-Shake transfer because the master intimates the slave after each step of the transfer.

Test: Synchronous & Asynchronous BUS - Question 19

 Asynchronous mode of transmission is suitable for systems with multiple peripheral devices. 

Detailed Solution for Test: Synchronous & Asynchronous BUS - Question 19

Answer: a
Explanation: This mode of transmission is suitable for multiple device situation as it supports variable speed transfer.

Test: Synchronous & Asynchronous BUS - Question 20

The asynhronous BUS mode of transmission allows for a faster mode of data transfer. 

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